Permanent wafer handlers with through silicon vias for thermalization and qubit modification
US-11158781-B2 · Oct 26, 2021 · US
Narasgond Adinath S is listed as an inventor on 15 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Narasgond Adinath S |
| Total patents | 15 |
| First publication | Oct 8, 2015 |
| Latest publication | Oct 26, 2021 |
Publications ranked by popularity score, then publication date.
US-11158781-B2 · Oct 26, 2021 · US
US-2021159382-A1 · May 27, 2021 · US
US-10686164-B2 · Jun 16, 2020 · US
US-10297876-B2 · May 21, 2019 · US
US-10162013-B2 · Dec 25, 2018 · US
US-2018331329-A1 · Nov 15, 2018 · US
US-10079375-B2 · Sep 18, 2018 · US
US-10069116-B2 · Sep 4, 2018 · US
US-2018040859-A1 · Feb 8, 2018 · US
US-9806299-B2 · Oct 31, 2017 · US
Latest publications not already listed above.
US-2017194607-A1 · Jul 6, 2017 · US
US-2017179549-A1 · Jun 22, 2017 · US
US-2017176542-A1 · Jun 22, 2017 · US
US-9620824-B1 · Apr 11, 2017 · US
US-2015288023-A1 · Oct 8, 2015 · US
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 15 |
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H01M10/0436 | 13 |
| Y02P70/50 | 13 |
| Y02E60/10 | 13 |
| H01M4/48 | 11 |
| H01M4/661 | 11 |