Tunable hardmask for overlayer metrology contrast

Patent metadata

Field	Value
Publication number	US-11121024-B2
Application number	US-201916542502-A
Country	US
Kind code	B2
Filing date	Aug 16, 2019
Priority date	Jan 4, 2018
Publication date	Sep 14, 2021
Grant date	Sep 14, 2021

Abstract

A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed.

First claim

What is claimed is:

1. A method of improving overlay metrology contrast, the method comprising:
forming at least one alignment feature in a dielectric oxide layer;
removing a portion of the dielectric oxide layer;
depositing, in a deposition chamber, an amorphous silicon layer on the dielectric oxide layer corresponding to the removed portion;
varying hydrogen content in the deposition chamber such that the amorphous silicon layer comprises hydrogen; and
depositing a multilayer patterning stack overlaying the amorphous silicon layer, wherein transmission of visible light from the multilayer patterning stack to the alignment feature is increased relative to not removing the portion of the dielectric oxide layer and depositing the amorphous silicon layer.

2. The method of claim 1 , wherein the amorphous silicon has an extinction coefficient (k) within a range of 0.4 to 0.03 at a wavelength of 633 nm and a refractive index (n) within a range of 4.1 to 3.2.

3. The method of claim 1 , wherein the amorphous silicon has an extinction coefficient (k) within a range of 0.09 to 0.03 at a wavelength of 633 nm and a refractive index (n) within a range of 3.5 to 3.2.

4. The method of claim 1 , wherein depositing the amorphous silicon layer comprises a vapor deposition process from a gas mixture comprising silane and hydrogen gas at a temperature within a range of about 30° C. to about 600° C. and a pressure within a range of about 0.1 Torr to about 10 Torr.

5. The method of claim 4 , wherein the hydrogen gas is greater than 10 mol % of the gas mixture and further reduces the extinction coefficient k value within a range from about 0.09 to about 0.03 and the refractive index value within a range of about 3.5 to about 3.2.

6. The method of claim 1 , wherein the amorphous silicon has an extinction coefficient (k) within a range of about 0.09 to about 0.03 at a wavelength of 633 nm.

7. The method of claim 1 , wherein depositing the amorphous silicon layer in the removed portion of the dielectric oxide layer comprises varying a hydrogen content in the amorphous silicon to reduce an extinction coefficient (k) at a wavelength of 633 nm and a refractive index (n) of the amorphous silicon.

8. The method of claim 1 , wherein depositing the amorphous silicon layer comprises a vapor deposition process from a gas mixture comprising silane at a temperature within a range of about 30° C. to about 600° C. and a pressure within a range of about 0.1 Torr to about 10 Torr to form the amorphous silicon layer; and doping the amorphous silicon layer with hydrogen to reduce the extinction coefficient (k) of the amorphous silicon within a range of about 0.4 to about 0.03 at a wavelength of 633 nm.

9. The method of claim 1 , wherein the multilayer patterning stack comprises an organic planarizing layer, a hardmask on the organic planarizing layer, and a photoresist on the hardmask layer.

10. A method of improving overlay metrology contrast, the method comprising:
forming at least one alignment feature in a dielectric oxide layer;
depositing an amorphous silicon layer on the dielectric oxide layer, wherein the depositing of the amorphous silicon layer comprises varying hydrogen content in a deposition chamber such that the amorphous silicon layer comprises hydrogen and is tuned to minimize reflection and maximize transmission; and
depositing a multilayer patterning stack on the tuned amorphous silicon layer, wherein the transmission of visible light from the multilayer patterning stack to the alignment feature is increased relative to not depositing the amorphous silicon layer.

11. The method of claim 10 , depositing an amorphous silicon layer in the removed portion of the dielectric oxide layer, wherein depositing the amorphous silicon comprises increasing a hydrogen content during deposition of the amorphous silicon layer to simultaneously reduce an extinction coefficient (k) at a wavelength of 633 nm and a refractive index (n) of the amorphous silicon.

12. The method of claim 10 , wherein the multilayer patterning stack comprises an organic planarizing layer, a hardmask on the organic planarizing layer, and a photoresist on the hardmask layer.

13. The method of claim 10 , wherein the amorphous silicon layer has a thickness within a range from about 5 nanometers to about 10 nanometers.

14. The method of claim 10 , wherein depositing the amorphous silicon layer comprises a vapor deposition process from a gas mixture comprising silane and hydrogen gas at a temperature within a range of about 30° C. to about 600° C. and a pressure within a range of about 0.1 Torr to about 10 Torr.

15. The method of claim 14 , wherein the hydrogen gas is greater than 10 mol % of the gas mixture and further reduces the extinction coefficient k value to within a range from about 0.09 to about 0.03 and the refractive index value to within a range of about 3.5 to about 3.2.

16. The method of claim 12 , wherein the multilayer patterning stack further comprises an adhesion layer, an antireflective layer or a combination thereof.

17. A method for tuning an amorphous silicon layer, the method comprising:
depositing an amorphous silicon layer under a multilayer patterning stack, wherein tuning the amorphous silicon layer comprises increasing hydrogen content in the amorphous silicon to simultaneously provide the amorphous silicon with an extinction coefficient (k) value within a range of about 0.4 to about 0.03 at a wavelength of about 633 nm and a refractive index of the amorphous silicon within a range of from about 4.1 to about 3.2.

18. The method of claim 17 , wherein increasing the hydrogen content in the amorphous silicon is in an amount effective to reduce the extinction coefficient (k) value to within a range from about 0.09 to about 0.03 and the refractive index (n) to within about 3.5 to about 3.2.

19. The method of claim 17 , wherein depositing the amorphous silicon layer comprises a vapor deposition process selected from the group consisting of chemical vapor deposition, plasma enhanced chemical vapor deposition, and plasma vapor deposition from a silane gas.

20. The method of claim 17 , wherein depositing the amorphous silicon layer comprises a vapor deposition process from a gas mixture comprising a silane gas and a hydrogen gas at a temperature within a range of about 30° C. to about 600° C. and a pressure within a range of about 0.1 Torr to about 10 Torr.

Assignees

• IBM

Inventors

• De Silva Ekmini A
• Felix Nelson
• Seshadri Indira
• Sieg Stuart A

Classifications

• H10P76/202

  for lift-off processes · CPC title

• H10W46/301

  for alignment · CPC title

• H10W72/50

  Bond wires · CPC title

• H10W46/00 Primary

  Marks applied to devices, e.g. for alignment or identification · CPC title

• H10W20/01

  Manufacture or treatment · CPC title