Contact structures

US10790376B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10790376-B2
Application numberUS-201816105102-A
CountryUS
Kind codeB2
Filing dateAug 20, 2018
Priority dateAug 20, 2018
Publication dateSep 29, 2020
Grant dateSep 29, 2020

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present disclosure generally relates to semiconductor structures and, more particularly, to contact structures and methods of manufacture. The structure includes: a plurality of gate structures comprising source and drain regions and sidewall spacers; contacts connecting to at least one gate structure of the plurality of gate structures; and at least one metallization feature connecting to the source and drain regions and extending over the sidewall spacers.

First claim

Opening claim text (preview).

What is claimed: 1. A structure, comprising: a plurality of gate structures comprising gate materials, source and drain regions and sidewall spacers; contacts connecting to at least one gate structure of the plurality of gate structures; and at least one misaligned metallization feature connecting to at least one of the source and drain regions, wherein the at least one misaligned metallization feature is directly above a top surface of the sidewall spacers and above top surfaces of the gate materials, wherein an upper surface of each of the sidewall spacers, in contact with the at least one misaligned metallization feature, is chamfered, wherein the at least one misaligned metallization feature is formed over a trench silicide structure connecting the at least one misaligned metallization feature to the at least one of the source and drain regions, and wherein the at least one misaligned metallization feature completely covers the chamfered upper surface of one of the sidewall spacers on one side of the trench silicide structure, and partially covers the chamfered upper surface of another one of the sidewall spacers on an opposite side of the trench silicide structure. 2. The structure of claim 1 , wherein the gate structures are over an active region of a device. 3. The structure of claim 1 , wherein the contacts of the at least one gate structure and the at least one misaligned metallization feature connecting to the source and drain regions extend below the sidewalls spacers. 4. The structure of claim 1 , further comprising recessed trench silicide structures over the source and drain regions and between the gate structures. 5. The structure of claim 4 , wherein at least one of the sidewall spacers are over etched. 6. The structure of claim 1 , wherein the sidewall spacers extend above the gate materials. 7. The structure of claim 6 , further comprising a first cavity over selective source and drain regions and a second cavity over selective gate structures. 8. The structure of claim 7 , wherein the first cavity over the selective source and drain regions is filled with a capping material. 9. The structure of claim 8 , wherein the second cavity over the selective gate structures is filled with a liner and a dielectric material. 10. The structure of claim 9 , wherein the liner is over sidewalls of the contacts of the at least one gate structure and the at least one misaligned metallization feature. 11. A structure, comprising: a gate structure comprising a gate material, over-etched sidewall spacers, source and drain regions, and a gate contact; a misaligned source and drain contact connecting to one of the source and drain regions, wherein the misaligned source and drain contact is directly above top surfaces of the over-etched sidewall spacers and is directly above a top surface of the gate material; and a liner over the gate contact and the misaligned source and drain contact, wherein an upper surface of each of the over-etched sidewall spacers, in contact with the misaligned source and drain contact, is chamfered, wherein the misaligned source and drain contact is formed over a trench silicide structure connecting the misaligned source and drain contact to the one of the source and drain regions, and wherein the misaligned source and drain contact completely covers the chamfered upper surface of one of the over-etched sidewall spacers on one side of the trench silicide structure, and partially covers the chamfered upper surface of another one of the over-etched sidewall spacers on an opposite side of the trench silicide structure. 12. The structure of claim 11 , wherein the liner is comprised of a nitride material. 13. The structure of claim 11 , further comprising trench silicide structures over the source and drain regions. 14. The structure of claim 13 , further comprising a nitride cap over the trench silicide structures. 15. The structure of claim 11 , wherein the gate contact is a misaligned gate contact. 16. The structure of claim 15 , wherein the misaligned gate contact completely covers an upper surface of one of the over-etched sidewall spacers on one side of the gate material and partially covers an upper surface of another of the over-etched sidewall spacers on an opposite side of the gate material. 17. The structure of claim 16 , further comprising: additional trench silicide structures over other ones of the source and drain regions; and a nitride cap over the trench silicide structures, wherein the liner is comprised of a nitride material, wherein the misaligned source and drain contact is at least one selected from a group consisting of: tungsten; cobalt; and copper, and wherein the gate contact extends below the sidewall spacers.

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What does patent US10790376B2 cover?
The present disclosure generally relates to semiconductor structures and, more particularly, to contact structures and methods of manufacture. The structure includes: a plurality of gate structures comprising source and drain regions and sidewall spacers; contacts connecting to at least one gate structure of the plurality of gate structures; and at least one metallization feature connecting to …
Who is the assignee on this patent?
Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification H10D64/258. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 29 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).