Method for processing a measured-value signal determined in an analog manner, a resolver system for implementing the method and a method for determining an output current of a converter

US10735022B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10735022-B2
Application numberUS-201916653246-A
CountryUS
Kind codeB2
Filing dateOct 15, 2019
Priority dateAug 26, 2009
Publication dateAug 4, 2020
Grant dateAug 4, 2020

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Abstract

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In method for processing a measured-value signal determined in an analog manner and a resolver system for implementing the method, the measured-value signal being supplied to a delta-sigma modulator, which makes a bit stream, particularly a one-bit data stream, available on the output side, in particular, whose moving average corresponds to the measured-value signal, the bit stream being supplied to a first digital filter, which converts the bit stream into a stream of digital intermediate words, that is a multibit data stream, the first digital filter having three serially arranged differentiators, the bit stream being clocked at a clock frequency f S , that is, at a clock-pulse period T S =1/f S , and therefore the stream of digital intermediate words being clocked, and thus updated, at a clock-pulse frequency f D , that is, at a clock-pulse period T D =1/f D , the output signal of the first digital filter being supplied to a second digital filter, the second digital filter having as its output data-word stream the difference between a first and a second result data-word stream, the first and second result data-word stream being determined around a first and second time interval from the intermediate data-word stream, the first and second time interval being situated at a distance in time T 1 , the first result data-word stream being determined as a time-discrete second derivation with time scale TD and the second result data-word stream being determined as a time-discrete second derivation with time scale TD.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for processing a measured-value signal detected by a sensor and determined in an analog manner, comprising: supplying the measured-value signal to a delta-sigma modulator; outputting a bit stream by the delta-sigma modulator; supplying the bit stream to a first digital filter; converting the bit stream, by the first digital filter, into an intermediate data-word stream of digital intermediate words, the bit stream being clocked and the stream of digital intermediate words being clocked and updated at a clock-pulse frequency corresponding to a sampling clock pulse of the delta-sigma modulator; supplying an output signal of the first digital filter to a second digital filter; and outputting a digital filtered measured value by the second filter as a difference between (a) a first sum of a value of the intermediate data word at a first point in time, plus a value of the intermediate data word at a second point in time, less double a value of the intermediate word at a third point in time centrally between the first point in time and the second point in time and (b) a second sum of a value of the intermediate data word at a fourth point in time, plus a value of the intermediate data word at a fifth point in time, less double a value of the intermediate word at a sixth point in time centrally between the third point in time and the fourth point in time. 2. The method according to claim 1 , wherein a time difference between the first point in time and the second point in time is equal to a time difference between the fourth point in time and the fifth point in time. 3. The method according to claim 1 , wherein a time difference between the third point in time and the sixth point in time is greater than twice the time difference between the first point in time and the second point in time. 4. The method according to claim 1 , wherein a time difference between the third point in time and the sixth point in time is greater than twice the time difference between the fourth point in time and the fifth point in time. 5. The method according to claim 2 , wherein a time difference between the third point in time and the sixth point in time is greater than twice the time difference between the first point in time and the second point in time and the time difference between the fourth point in time and the fifth point in time. 6. The method according to claim 1 , wherein a time difference between the third point in time and the sixth point in time is a multiple of a clock pulse period of the sampling clock pulse of the delta-sigma modulator. 7. The method according to claim 1 , wherein the bit stream includes a one-bit data stream. 8. The method according to claim 1 , wherein the stream of intermediate words includes a multi-bit data stream. 9. The method according to claim 1 , wherein the measured-value signal represent an angular position of a rotor in relation to a stator. 10. The method according to claim 1 , wherein the measured-value signal is output by a resolver system adapted to detect an angular position of a rotor relative to a stator, the measured value representing the angular position. 11. The method according to claim 1 , wherein the first digital filter includes three integrators or accumulators arranged directly one after another. 12. The method according to claim 1 , wherein the measured-value signal represents a moving average. 13. The method according to claim 1 , wherein the first digital filter includes a plurality of serially arranged accumulators or integrators. 14. A resolver system adapted to detect an angular position of a rotor in relation to a stator, the rotor bearing a rotor coil and the stator having two stator coils that are mutually shifter in a circumferential direction by 90°, the rotor coil having a carrier signal produced by a carrier signal generator applied to it, wherein each signal occurring at a respective stator coil is supplied as a respective measured-value signal to a respective processing channel, the resolver system adapted to perform the method recited in claim 1 .

Assignees

Inventors

Classifications

  • H03M3/462Primary

    Details relating to the decimation process (decimation filters in general H03H17/0416, H03H17/0621) · CPC title

  • for position encoding, e.g. using resolvers or synchros (H03M1/485 takes precedence) · CPC title

  • Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal, e.g. by interpolation, by curve-fitting, by smoothing · CPC title

  • Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

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What does patent US10735022B2 cover?
In method for processing a measured-value signal determined in an analog manner and a resolver system for implementing the method, the measured-value signal being supplied to a delta-sigma modulator, which makes a bit stream, particularly a one-bit data stream, available on the output side, in particular, whose moving average corresponds to the measured-value signal, the bit stream being suppli…
Who is the assignee on this patent?
Sew Eurodrive Gmbh & Co
What technology area does this patent fall under?
Primary CPC classification H03M3/462. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 04 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).