Matched filter for a first order sigma delta capacitance measurement system and a method to determine the same

Patent metadata

Field	Value
Publication number	US-2016352353-A1
Application number	US-201514726273-A
Country	US
Kind code	A1
Filing date	May 29, 2015
Priority date	May 29, 2015
Publication date	Dec 1, 2016
Grant date	—

Abstract

A processing system that includes a sigma-delta converter and a filter unit that applies a matched filter to the output of the sigma-delta converter. The processing system drives sensor electrodes for capacitive sensing and receives resulting signals with the sensor electrodes in response. The processing system applies these resulting signals to sigma-delta converters. The matched filter boosts the signal-to-noise ratio of the signal received from the sigma-delta converter, thereby improving the ability to sense presence of an input object. The filter unit may apply different, customized matched filters for different capacitive pixels to improve the signal-to-noise ratio of each capacitive pixel in a customized manner.

First claim

What is claimed is:

1 . A processing system for generating filtered digital touch capacitance data, the processing system comprising:
a sigma-delta converter configured to:
receive a first resulting signal with a first capacitive sensing electrode of a plurality of capacitive sensing electrodes, and
apply sigma-delta conversion to the first resulting signal to generate a first sigma-delta quantized signal; and
a filter logic unit configured to apply a first matched filter to the sigma-delta quantized signal to generate a first filtered sigma-delta quantized signal.

2 . The processing system of claim 1 , wherein:
the first matched filter is configured to approximate a substantially noise-free resulting signal received with the first capacitive sensing electrode.

3 . The processing system of claim 1 , wherein:
the first matched filter is based on a discrete time cumulative sum signal.

4 . The processing system of claim 3 , wherein:
the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a baseline sigma-delta quantized signal up to a phase index corresponding to the value.

5 . The processing system of claim 3 , wherein:
the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a time-reversed baseline sigma-delta quantized signal up to a phase index corresponding to the value.

6 . The processing system of claim 5 , wherein:
the first matched filter comprises a time-reversed version of the discrete time cumulative sum signal with high frequencies filtered out, the high frequencies substantially equal to or greater than a clock signal frequency that is associated with the baseline sigma-delta quantized signal.

7 . The processing system of claim 1 , wherein:
the sigma-delta converter is further configured to:
receive a second resulting signal with a second capacitive sensing electrode of the plurality of capacitive sensing electrodes, and
apply sigma-delta conversion to the second resulting signal to generate a second sigma-delta quantized signal; and
the filter logic unit is further configured to apply a second matched filter to the second sigma-delta quantized signal to generate a second filtered sigma-delta quantized signal, the second matched filter differing from the first matched filter in a manner that is based on differences in impedance characteristics between the first capacitive sensing electrode and the second capacitive sensing electrode.

8 . The processing system of claim 1 , wherein:
the first matched filter is periodic; and the filter logic unit is further configured to store the first matched filter as a plurality of constants in a phase-indexed lookup table.

9 . The processing system of claim 1 , wherein the filter logic is further configured to:
apply a second matched filter that is phase-shifted with respect to the matched filter by approximately 90 degrees to the sigma-delta quantized signal to generate a quadrature-phase filtered sigma-delta quantized signal.

10 . A method for generating filtered digital touch capacitance data, the method comprising:
receiving a first resulting signal with a first capacitive sensing electrode of a plurality of capacitive sensing electrodes; applying sigma-delta conversion to the first resulting signal to generate first sigma-delta quantized signal; and applying a first matched filter to the sigma-delta quantized quantized signal to generate first filtered sigma-delta quantized signal.

11 . The method of claim 10 , wherein:
the first matched filter is configured to approximate a substantially noise-free resulting signal received with the first capacitive sensing electrode.

12 . The method of claim 10 , wherein:
the first matched filter is based on a discrete time cumulative sum signal.

13 . The method of claim 12 , wherein:
the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a baseline sigma-delta quantized signal up to a phase index corresponding to the value.

14 . The method of claim 12 , wherein:
the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a time-reversed baseline sigma-delta quantized signal up to a phase index corresponding to the value.

15 . The method of claim 14 , wherein:
the first matched filter comprises a time-reversed version of the discrete time cumulative sum signal with high frequencies filtered out, the high frequencies substantially equal to or greater than a clock signal Frequency that is associated with the baseline sigma-delta quantized signal.

16 . The method of claim 10 , further comprising:
receiving a second resulting signal with a second capacitive sensing electrode of the plurality of capacitive sensing electrodes, and applying sigma-delta conversion to the second resulting signal to generate a second sigma-delta quantized signal; and applying a second matched filter to the second sigma-delta quantized signal to generate a second filtered sigma-delta quantized signal, the second matched filter differing from the first matched filter in a manner that is based on differences in impedance characteristics between the first capacitive sensing electrode and the second capacitive sensing electrode.

17 . The me of claim 10 , wherein:
the first matched filter is periodic; and, the method further comprises: storing the first matched filter as a plurality of constants in a phase-indexed look table.

18 . The method of claim 10 , further comprising:
applying a second matched filter that is phase-shifted with respect to the matched filter by approximately 90 degrees to the sigma-delta quantized signal to generate a quadrature-phase filtered sigma-delta quantized signal.

19 . An input device, comprising,
a plurality of capacitive sensing electrodes: and a processing system coupled to the plurality of capacitive sensing electrodes, the processing system comprising:
a sigma-delta converter configured to:
receive a first resulting signal with a first capacitive sensing electrode of a plurality of capacitive sensing electrodes, and
apply sigma-delta conversion to the first resulting signal to generate a first sigma-delta quantized signal; and

a filter logic unit configured to apply a first matched filter to the sigma-delta quantized signal to generate a first filtered sigma-delta quantized signal.

20 . The input device of claim 19 , wherein:
the first matched filter is configured to approximate a substantially noise-free resulting signal received with the first capacitive sensing electrode.

Assignees

• Synaptics Inc

Inventors

• Hargreaves Kirk
• Reynolds Joseph Kurth

Classifications

• G06F3/044

  by capacitive means · CPC title

• H03M3/458 Primary

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

• G06F3/0416

  Control or interface arrangements specially adapted for digitisers · CPC title

• G06F3/04166 Primary

  Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184) · CPC title

• G06F3/0443

  using a single layer of sensing electrodes · CPC title