Semiconductor package and manufacturing method thereof
US-2019333782-A1 · Oct 31, 2019 · US
Semiconductor packages including die over-shift indicating patterns
US10692816B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10692816-B2 |
| Application number | US-201815981603-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 16, 2018 |
| Priority date | Nov 9, 2017 |
| Publication date | Jun 23, 2020 |
| Grant date | Jun 23, 2020 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A semiconductor package includes a package substrate including a die attachment region, a semiconductor die attached to the die attachment region, and a die over-shift indicating pattern disposed on or in the package substrate and spaced apart from the die attachment region. The die over-shift indicating pattern is used as a reference pattern for obtaining a shifted distance of the semiconductor die.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor package comprising: a package substrate including a die attachment region; a semiconductor die attached to the die attachment region; and a die over-shift indicating pattern disposed in the package substrate and spaced apart from the die attachment region on only one side of the semiconductor die, wherein the die over-shift indicating pattern is used as a reference pattern for obtaining a shifted distance of the semiconductor die. 2. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern includes a line-shaped pattern which is parallel with a line at the side of the die attachment region. 3. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern includes two line-shaped patterns which are spaced apart from each other and are parallel with each other. 4. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern is a groove-shaped pattern that is engraved at a surface of the package substrate. 5. The semiconductor package of claim 4 , wherein the groove-shaped pattern is formed in a solder resist layer included in the package substrate. 6. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern protrudes from a surface of the package substrate. 7. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern is an ink printed pattern disposed on a surface of the package substrate. 8. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern is located at substantially the same level as interconnection patterns formed in the package substrate. 9. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern is disposed between a side surface of the package substrate and the die attachment region. 10. The semiconductor package of claim 9 , wherein the die over-shift indicating pattern is a line-shaped pattern which is parallel with the side surface of the package substrate. 11. The semiconductor package of claim 1 , wherein the die over-shift indicating pattern includes: a first die over-shift indicating pattern extending parallel with a side surface of the package substrate; and a second die over-shift indicating pattern disposed between the first die over-shift indicating pattern and the die attachment region parallel with the first die over-shift indicating pattern, wherein a distance between the second die over-shift indicating pattern and the die attachment region is substantially equal to a distance between the first die over-shift indicating pattern and the second die over-shift indicating pattern.
Assignees
Inventors
Classifications
for supporting or gripping · CPC title
Package configurations · CPC title
the substrate having spherical bumps for external connection · CPC title
Alignment aids, e.g. alignment marks · CPC title
Interconnections or connectors in packages · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10692816B2 cover?
- A semiconductor package includes a package substrate including a die attachment region, a semiconductor die attached to the die attachment region, and a die over-shift indicating pattern disposed on or in the package substrate and spaced apart from the die attachment region. The die over-shift indicating pattern is used as a reference pattern for obtaining a shifted distance of the semiconducto…
- Who is the assignee on this patent?
- Sk Hynix Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W70/68. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 23 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).