Two-component bump metallization

Patent metadata

Field	Value
Publication number	US-10608158-B2
Application number	US-201715721238-A
Country	US
Kind code	B2
Filing date	Sep 29, 2017
Priority date	Sep 29, 2017
Publication date	Mar 31, 2020
Grant date	Mar 31, 2020

Abstract

A technique relates to a structure. An under-bump-metallization (UBM) structure includes a first region and a second region. The first and second regions are laterally positioned in the UBM structure. The first region includes a superconducting material. A substrate opposes the UBM structure. A superconducting solder material joins the first region to the substrate and the second region to the substrate.

First claim

What is claimed is:

1. A structure comprising:
an under-bump-metallization (UBM) structure comprising a first region and a second region, the first and second regions being laterally positioned in the UBM structure such that the first and second regions are in parallel with each other, wherein the first region comprises a superconducting material;
a substrate opposing the UBM structure; and
a superconducting solder material joining the first region to the substrate and the second region to the substrate.

2. The structure of claim 1 , wherein the UBM structure is arranged such that the first region is laterally adjacent to the second region, enabling the superconducting solder material to physically contact both the first and second regions.

3. The structure of claim 1 , wherein the UBM structure is arranged to have one or more first locations containing the first region and have one or more second locations containing the second region.

4. The structure of claim 3 , wherein the one or more first locations are different from the one or more second locations.

5. The structure of claim 1 , wherein the second region comprises a non-superconducting material.

6. The structure of claim 1 , wherein the substrate comprises a superconducting circuit connected to the superconducting solder material, such that the first region is electrically connected to the superconducting circuit.

7. The structure of claim 1 , wherein a superconducting junction is formed between the superconducting solder material and the first region.

8. A structure comprising:
a first under-bump-metallization (UBM) structure comprising a first region and a second region, the first and second regions being laterally positioned in the first UBM structure such that the first and second regions are in parallel with each other, the first UBM structure being connected to a first substrate;
a second UBM structure comprising another first region and another second region, the another first and another second regions being laterally positioned in the second UBM structure such that the another first and another second regions are in parallel with each other, the second UBM structure being connected to a second substrate; and
a superconducting solder material joining the first region and the second region of the first UBM structure to the another first region and the another second region of the second UBM structure, wherein the first region and the another first region comprise superconducting material.

9. The structure of claim 8 , wherein the first UBM structure is arranged such that the first region is laterally adjacent to the second region, enabling the superconducting solder material to physically contact both the first and second regions; and
wherein the second UBM structure is arranged such that the another first region is laterally adjacent to the another second region, enabling the superconducting solder material to physically contact both the another first and another second regions.

10. The structure of claim 8 , wherein the first UBM structure is arranged to have one or more first locations containing the first region and have one or more second locations containing the second region; and
wherein the second UBM structure is arranged to have one or more first locations containing the another first region and have one or more second locations containing the another second region.

11. The structure of claim 8 , wherein the second region and the another second region comprise non-superconducting material.

12. The structure of claim 8 , wherein the first substrate comprises a first superconducting circuit electrically connected to the superconducting solder material;
wherein the second substrate comprises a second superconducting circuit electrically connected to the superconducting solder material, such that the first and second superconducting circuits are electrically connected via the first region, the another first region, and the superconducting solder material.

13. The structure of claim 8 , wherein a superconducting junction is formed between the superconducting solder material and the first region and between the superconducting solder material and the another first region.

14. A system comprising:
a device comprising:
an under-bump-metallization (UBM) structure comprising a first region and a second region, the first and second regions being laterally positioned in the UBM structure such that the first and second regions are in parallel with each other, wherein the first region comprises a superconducting material;
a substrate opposing the UBM structure; and
a superconducting solder material joining the first region to the substrate and the second region to the substrate; and

a cooling system configured to reduce a temperature to a superconducting temperature associated with the device.

15. The system of claim 14 , wherein the UBM structure is arranged such that the first region is laterally adjacent to the second region, enabling the superconducting solder material to physically contact both the first and second regions.

16. The system of claim 14 , wherein the device comprises another UBM structure comprising another first region and another second region, the another first and another second regions being laterally positioned in the another UBM structure such that the another first and another second regions are in parallel with each other, the another UBM structure being connected to a second substrate.

17. The system of claim 16 , wherein the another UBM structure is arranged such that the another first region is laterally adjacent to the another second region, enabling the superconducting solder material to physically contact both the another first and another second regions.

18. A method of forming a device, the method comprising:
providing an under-bump-metallization (UBM) structure comprising a first region and a second region, the first and second regions being laterally positioned in the UBM structure such that the first and second regions are in parallel with each other, wherein the first region comprises a superconducting material;
providing a substrate opposing the UBM structure; and
joining the substrate to the first region and to the second region with a superconducting solder material.

19. The method of claim 18 , wherein the UBM structure is arranged such that the first region is laterally adjacent to the second region, enabling the superconducting solder material to physically contact both the first and second regions.

20. The method of claim 18 , wherein the UBM structure is arranged to have one or more first locations containing the first region and have one or more second locations containing the second region.

21. The method of claim 20 , wherein the one or more first locations are different from the one or more second locations.

22. The method of claim 18 , wherein the second region comprises a non-superconducting material.

23. A method of forming a device, the method comprising:
providing a first under-bump-metallization (UBM) structure comprising a first region and a second region, the first and second regions being laterally positioned in the first UBM structure such that the first and second regions are in parallel with each other, the first UBM structure being connected to a first substrate;
providing a second UBM structure comprising another first region and another second region, the another first and another second regions being laterally pos

Assignees

• IBM

Inventors

• Abraham David W
• Cotte John M
• Lewandowski Eric P

Classifications

• H01L2224/05076

  Electricity · mapped topic

• H01L2224/05187

  Electricity · mapped topic

• H01L2224/05576

  Electricity · mapped topic

• H01L24/16

  Electricity · mapped topic

• H01L2224/05578

  Electricity · mapped topic