Systems and methods for wafer alignment

US10600667B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10600667-B2
Application numberUS-201916421340-A
CountryUS
Kind codeB2
Filing dateMay 23, 2019
Priority dateJun 1, 2016
Publication dateMar 24, 2020
Grant dateMar 24, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.

First claim

Opening claim text (preview).

We claim: 1. A non-transitory computer-readable storage medium comprising instructions that, when executed by one or more processing devices, cause the one or more processing devices to: determine a center location of each of a plurality of features on a wafer; determine an average center location of the plurality of features; compare the average center location with a reference location; and generate an instruction to adjust a position of the wafer in response to the comparison. 2. The non-transitory computer-readable storage medium of claim 1 , wherein determining the center location of each of the plurality of features comprises detecting intensity of light reflected from the plurality of features. 3. The non-transitory computer-readable storage medium of claim 1 , wherein determining the center location of each of the plurality of features comprises shape recognition or image pattern recognition. 4. The non-transitory computer-readable storage medium of claim 1 , wherein the reference location is a center of a camera view field or a reference point associated with the wafer. 5. The non-transitory computer-readable storage medium of claim 1 , wherein the instruction to adjust the position of the wafer comprises instructions for moving a substrate support configured to hold the wafer. 6. The non-transitory computer-readable storage medium of claim 1 , wherein the instruction to adjust the position of the wafer comprises instructions for an electrical motor to move the wafer. 7. The non-transitory computer-readable storage medium of claim 1 , wherein determining the average center location comprises computing a mean, median, or weighted average of the determined center locations. 8. The non-transitory computer-readable storage medium of claim 1 , wherein determining the center location of each of the plurality of features comprises computing an x and y coordinate for each of the plurality of features. 9. The non-transitory computer-readable storage medium of claim 8 , wherein determining the average center location comprises computing an average x and y coordinate for the average center location. 10. A non-transitory computer-readable storage medium comprising instructions that, when executed by one or more processing devices, cause the one or more processing devices to: perform a coarse alignment procedure for a wafer by: estimating a misalignment of the wafer based on a first comparison of a plurality of electrical features on the wafer and a template, and generating a first instruction to adjust a position of the wafer based on the estimated misalignment; and after performing the coarse alignment procedure, perform a fine alignment procedure for the wafer by: determining a center location of individual electrical features of the plurality of electrical features on the wafer, averaging the center locations of the individual electrical features together to obtain an average center location of the plurality of electrical features comparing, in a second comparison, the average center location with a reference location, and generating a first instruction to adjust a position of the wafer based on the second comparison if the average center location is not within a predetermined distance of the reference location. 11. The non-transitory computer-readable storage medium of claim 10 , wherein estimating misalignment of the wafer based on the comparison of the plurality of electrical features on the wafer and the template further comprises receiving imaging data and comparing the imaging data to predetermined imaging data associated with the template. 12. The non-transitory computer-readable storage medium of claim 10 , wherein determining the center location of the individual electrical features further comprises computing an x and y coordinate for the individual electrical features in the plurality of electrical features and computing an average x and y coordinate for the average center location. 13. The non-transitory computer-readable storage medium of claim 10 , wherein determining the center location of the individual electrical features further comprises detecting light intensity reflected from the wafer. 14. A non-transitory computer-readable storage medium comprising instructions that, when executed by one or more processing devices, cause the one or more processing devices to: determine a center location of individual electrical features of a plurality of electrical features on a wafer; average the center locations of the individual electrical features together to obtain an average center location of the plurality of electrical features; compare the average center location with a reference location; and generate an instruction to adjust a position of the wafer based on the comparison if the average center location is not within a predetermined distance of the reference location. 15. The non-transitory computer-readable storage medium of claim 14 , wherein the instructions, when executed by the one or more processing devices, further cause the one or more processing devices to: compare the plurality of electrical features to a template; estimate misalignment of the wafer based on a comparison of the plurality of electrical features and the template; and generate another instruction to adjust a position of the wafer based on the estimated misalignment. 16. The non-transitory computer-readable storage medium of claim 14 , wherein determining the center location of the individual electrical features further comprises: detecting intensity of light reflected from the plurality of electrical features. 17. The non-transitory computer-readable storage medium of claim 14 , wherein determining the center location of the individual electrical features further comprises: determining the center location of the individual electrical features based on shape or image pattern recognition. 18. The non-transitory computer-readable storage medium of claim 14 , wherein the reference location is a center of a camera view field or a reference point associated with the wafer. 19. The non-transitory computer-readable storage medium of claim 14 , wherein averaging the center locations comprises computing a mean, median, or weighted average. 20. A non-transitory computer-readable storage medium comprising instructions that, when executed by one or more processing devices, cause the one or more processing devices to: determine an offset of an average center location of a plurality of electrical features fabricated on a wafer with a reference center location of an alignment template associated with the wafer, wherein the average center location of the plurality of electrical features is based on center locations of the individual electrical features in the plurality of electrical features; and generate an instruction to align the wafer to a processing tool based on the determined offset. 21. The non-transitory computer-readable storage medium of claim 20 , wherein the instructions, when executed by the one or more processing devices, further cause the one or more processing devices to: before determining the offset of the average center location of the plurality of electrical features, perform a coarse alignment procedure by comparing the plurality of electrical features to a template; estimate misalignment of the wafer based on a comparison of the plurality of electrical features and the template; and generate an instruction to adjust a position of the wafer based on the estimated misalignm

Assignees

Inventors

Classifications

  • H10P72/53Primary

    using optical controlling means · CPC title

  • Reference, i.e. alignment of original or workpiece with respect to a reference not on the original or workpiece · CPC title

  • Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching · CPC title

  • Camera · CPC title

  • Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection · CPC title

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What does patent US10600667B2 cover?
Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the averag…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10P72/53. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 24 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).