Semiconductor devices and methods for backside photo alignment
US-9299663-B2 · Mar 29, 2016 · US
US9748128B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9748128-B1 |
| Application number | US-201615170517-A |
| Country | US |
| Kind code | B1 |
| Filing date | Jun 1, 2016 |
| Priority date | Jun 1, 2016 |
| Publication date | Aug 29, 2017 |
| Grant date | Aug 29, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Various embodiments of aligning wafers are described herein. In one embodiment, a photolithography system aligns a wafer by averaging individual via locations. In particular, some embodiments of the present technology determine the center locations of individual vias on a wafer and average them together to obtain an average center location of the set of vias. Based on a comparison of the average center location to a desired center location, the present technology adjusts the wafer position. Additionally, in some embodiments, the present technology compares wafer via patterns to a template and adjusts the position of the wafer based on the comparison.
Opening claim text (preview).
We claim: 1. A method for aligning a wafer, the method comprising: performing a coarse alignment procedure by (a) estimating misalignment of the wafer based on a comparison of a set of vias fabricated on the wafer and a via template, and (b) adjusting a position of the wafer based on the estimated misalignment; and after performing the coarse alignment procedure, performing a fine alignment procedure by (a) determining a center location of individual vias of the set of vias fabricated on the wafer, (b) averaging the center locations of the individual vias together to obtain an average center location of the set of vias, (c) comparing the average center location with a reference location, and (d) adjusting the position of the wafer based on the averaged center location comparison if the average center location is not within a described distance of the reference location. 2. The method of claim 1 , wherein estimating misalignment of the wafer based on the comparison of the set of vias fabricated on the wafer and the via template further comprises receiving imaging data and comparing the imaging data to predetermined imaging data associated with the template. 3. The method of claim 1 , wherein determining the center location of the individual vias further comprises computing an x and y coordinate for the individual vias in the set of vias and computing an average x and y coordinate for the average center location. 4. The method of claim 1 , wherein determining the center location of the individual vias further comprises detecting light intensity reflected from the wafer. 5. A method for aligning a wafer, the method comprising: determining a center location of individual vias of a set of vias fabricated on the wafer; averaging the center locations of the individual vias together to obtain an average center location of the set of vias; comparing the average center location with a reference location; and adjusting a position of the wafer based on the comparison if the average center location is not within a prescribed distance of the reference location. 6. The method of claim 5 , the method further comprising: comparing the set of vias to a via template; estimating misalignment of the wafer based on a comparison of the set of vias and the via template; and adjusting the position of the wafer based on the estimated misalignment. 7. The method of claim 5 , wherein determining the center location of the individual vias further comprises: detecting intensity of light reflected from the set of vias. 8. The method of claim 5 , wherein determining the center location of the individual vias further comprises: determining the center location of the individual vias based on shape or image pattern recognition. 9. The method of claim 5 , wherein the reference location is a center of a camera view field or a reference point associated with the wafer. 10. The method of claim 5 , wherein adjusting the position of the wafer further comprises moving a substrate support configured to hold the wafer. 11. A non-transitory computer-readable storage medium containing instructions that, when executed by one or more processors, perform a method for aligning a wafer, the method comprising: receiving digital imaging data of a set of vias fabricated on the wafer; determining center locations of individual vias on the set of vias using the digital imaging data; averaging the center locations of the individual vias on the set of vias to obtain an average center location; comparing the average center location with a reference location; and transmitting instructions to adjust or not adjust a position of the wafer based on the comparison between the average center location and the reference location. 12. The non-transitory computer-readable storage medium of claim 11 , wherein determining the center location of the individual vias further comprises: determining the center locations of the individual vias, partially based on detecting intensity of light reflected from the set of vias. 13. The non-transitory computer-readable storage medium of claim 11 , wherein the reference location is the center of a camera view field or a reference point associated with the wafer. 14. A system for aligning a wafer, the system comprising: an illumination source; a substrate support configured to hold the wafer; a controller configured to move the substrate support; the controller comprising a processor coupled to a memory, the memory storing instructions that, when executed by the processor, cause the system to: determine center locations of individual vias of a set of vias fabricated on a wafer; average the center locations of the individual vias together to obtain an average center location of the set of vias; compare the average center location with a reference location; and adjust a position of the wafer based on the comparison if the average center location is not within a prescribed distance of the reference location. 15. The system of claim 14 , wherein the instructions further comprise causing the system to: before determining the center locations of the individual vias, receive digital imaging data for at least a portion of the wafer; determine that the portion of the wafer matches a template; perform a coarse alignment procedure by estimating misalignment of the wafer based on a comparison of the portion of the wafer and the template; and adjust the position of the wafer based on the estimated misalignment. 16. The system of claim 14 , the system further comprising a mask or lens. 17. The system of claim 14 , wherein the reference location is a center of a camera view field or a reference point associated with a via. 18. A method for aligning a wafer, the method comprising: determining an offset of an average center location of a set of vias fabricated on the wafer with a reference center location of a via alignment template associated with the wafer, wherein the average center location of the set of vias is based on center locations of the individual vias in the set of vias; and aligning the wafer by moving a substrate support carrying the wafer based on the determined offset. 19. The method of claim 18 , the method further comprising: before determining the offset of the average center location of the set of vias, performing a coarse alignment procedure by comparing the set of vias to a via template; estimating misalignment of the wafer based on a comparison of the set of vias and the via template; and adjusting a position of the wafer based on the estimated misalignment. 20. The method of claim 18 , wherein determining an offset of an average center location of the individual vias further comprises: determining a center location of the set of vias based on shape or image pattern recognition or detecting intensity of light reflected from the set of vias.
using optical controlling means · CPC title
Alignment other than original with workpiece · CPC title
Position of the article · CPC title
Orientation of articles · CPC title
Alignment type or strategy, e.g. leveling, global alignment · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.