Location-specific tuning of stress to control bow to control overlay in semiconductor processing

Patent metadata

Field	Value
Publication number	US-10475657-B2
Application number	US-201715695961-A
Country	US
Kind code	B2
Filing date	Sep 5, 2017
Priority date	Sep 5, 2016
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

Techniques herein include systems and methods for correcting pattern overlay errors by correcting or adjusting bowing of wafers. Location-specific tuning of stress on semiconductor substrates reduces overlay error. Location-specific tuning of stress independently modifies specific regions, areas, or point locations on a substrate to change wafer bow at those specific locations, which reduces overlay error on substrates, which in turn improves overlay of subsequent patterns created on the substrate. Techniques herein include receiving a substrate with some amount of overlay error, measuring bow of the substrate to map z-height deviations across the substrate, generating an overlay correction pattern, and then physically modifying internal stresses on the substrate at specific locations with modifications independent of other coordinate locations. Such modifications can include etching a backside surface of the substrate. One or more processing modules can be used for such processing.

First claim

The invention claimed is:

1. A system for correcting wafer overlay on a substrate having a front side working surface and a backside surface after a series of processing step on the front side working surface have occurred, the system comprising:
a metrology module configured to measure, after the series of processing steps on the front side working surface have occurred, bow of a substrate producing a bow measurement that maps z-height deviations on the substrate relative to one or more reference z-height values:
a coating module configured to coat a backside surface of a substrate with a radiation-sensitive material after the series of processing steps on the front side working surface have occurred;
a controller configured to generate an overlay correction pattern that defines adjustments to internal stresses at specific locations on the substrate based on the bow measurement of the substrate after the series of processing steps on the front side working surface have occurred, wherein a first given location on the substrate has a different internal stress adjustment defined as compared to a second given location on the substrate in the overlay correction pattern;
an imaging module configured to expose the backside surface to a pattern of actinic radiation based on the overlay correction pattern;
a development module configured to develop the radiation-sensitive material after exposure to the pattern of actinic radiation to result in the radiation-sensitive material forming a relief pattern on the backside surface of the substrate; and
an etching module configured to etch the backside surface of the substrate using the relief pattern as an etch mask thereby reducing overlay error of the substrate after the series of processing steps on the front side working surface have occurred and before a next processing step on the front side working surface occurs.

2. The system of claim 1 , further comprising an automated substrate handling system configured to transport the substrate among the metrology module, the coating module, the imaging module, the development module, and the etching module.

3. The system of claim 2 , wherein all of the metrology module, the coating module, the imaging module, the development module, and the etching module are on a common platform.

4. The system of claim 2 , wherein the automated substrate handling system is configured to rotate the substrate to selectively have a working surface or a backside surface facing upwards.

5. The system of claim 1 , further comprising a stripping module configured to remove remaining radiation-sensitive material from the backside surface.

6. The system of claim 5 , wherein the stripping module is configured to use plasma to burn off the remaining radiation-sensitive material from the backside surface.

7. The system of claim 5 , wherein the stripping module is configured to use liquid chemistry to remove the remaining radiation-sensitive material from the backside surface.

8. The system of claim 1 , further comprising a bake module configured to bake the radiation-sensitive material on the backside surface of the substrate.

9. The system of claim 1 , further comprising a deposition module configured to deposit one or more films on the backside surface of the substrate.

10. The system of claim 9 , wherein the deposition module is configured to deposit two or more films of opposing stresses.

11. The system of claim 1 , wherein the system is configured to generate the pattern of actinic radiation as a bow correction image.

12. The system of claim 11 , wherein the system is configured to generate the overlay correction image sufficient to reduce at least second order bowing.

13. The system of claim 11 , wherein the system is configured to generate the overlay correction pattern sufficient to define the relief pattern that defines sufficient support structures in soluble areas to provide mechanical support structures after development sufficient to be in contact with pins on a photolithography chuck when positioned on the photolithography chuck.

14. The system of claim 1 , wherein the etching module is configured to etch the backside surface of the substrate using liquid etch chemistry.

15. The system of claim 1 , wherein the imaging module is configured to use a direct-write exposure tool.

16. The system of claim 15 , wherein the imaging module uses one or more mirrors to direct electromagnetic radiation at the substrate.

17. The system of claim 15 , wherein the imaging module is configured to project an image on the backside surface of the substrate using a light source having a spectral line selected from the group consisting of 436 nanometers, 405 nanometers, 365 nanometers, 248 nanometers, and 193 nanometers.

18. The system of claim 1 , further comprising a cleaning module configured to clean the backside surface or a working surface of the substrate.

19. The system of claim I, wherein the metrology module configured to measure bow of the substrate comprises an optical sensor configured to measure bow of the substrate.

20. The system of claim 1 , wherein the metrology module configured to measure bow of the substrate comprises an acoustic sensor configured to measure bow of the substrate.

Assignees

• Tokyo Electron Ltd

Inventors

• Devilliers Anton J

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P76/00

  Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography · CPC title

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/27

  Structural arrangements therefor · CPC title

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title