System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chucking

US10025894B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10025894-B2
Application numberUS-201615172667-A
CountryUS
Kind codeB2
Filing dateJun 3, 2016
Priority dateOct 11, 2012
Publication dateJul 17, 2018
Grant dateJul 17, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Systems and methods for prediction of in-plane distortions (IPD) due to wafer shape in semiconductor wafer chucking process is disclosed. A series of Zernike basis wafer shapes process to emulate the non-linear finite element (FE) contact mechanics model based IPD prediction is utilized in accordance with one embodiment of the present disclosure. The emulated FE model based prediction process is substantially more efficient and provides accuracy comparable to the FE model based IPD prediction that utilizes full-scale 3-D wafer and chuck geometry information and requires computation intensive simulations. Furthermore, an enhanced HOS IPD/OPD prediction process based on a series of Zernike basis wafer shape images is also disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer implemented method for providing in-plane distortion (IPD) prediction, the method comprising: (a) generating, with one or more processors, a series of Zernike basis wafer shapes; (b) performing, with the one or more processors, finite element (FE) model based IPD prediction for the series of Zernike basis wafer shapes; (c) performing, with the one or more processors, higher order shape (HOS) based IPD prediction for the series of Zernike basis wafer shapes; (d) comparing, with the one or more processors, the FE model based IPD prediction and the HOS based IPD prediction of a particular Zernike basis wafer shape of the series of Zernike basis wafer shapes to determine whether said particular Zernike basis wafer shape produces large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction; (e) storing, in memory, the Zernike basis wafer shapes that produce large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction; and (f) configuring a process tool to compensate for at least one of overlay error or misalignment based on a HOS based IPD prediction for a given wafer utilizing the stored Zernike basis wafer shapes. 2. The method of claim 1 , wherein providing the HOS based IPD prediction for the given wafer utilizing the stored Zernike basis wafer shapes further comprises: obtaining a wafer shape image of the given wafer; performing HOS based IPD prediction for the wafer shape image of the given wafer; decomposing the wafer shape image to a linear combination of Zernike basis images; identifying, among the linear combination of Zernike basis images, a subset of Zernike basis images that produce large prediction differences, wherein the subset of Zernike basis images that produce large prediction differences are identified based on the stored Zernike basis wafer shapes; and combining the FE model based IPD prediction for each one of the subset of Zernike basis images that produce large prediction differences with the HOS based IPD prediction result for the given wafer. 3. The method of claim 1 , wherein a particular Zernike basis wafer shape is identified as a Zernike basis wafer shape that produces large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction when the prediction differences exceed a predetermined threshold. 4. The method of claim 1 , wherein steps (a) through (e) are a part of a prediction process and are performed prior to and independently from step (f). 5. The method of claim 1 , wherein step (f) is performed prior to and after a wafer patterning process for at least one of: overlay error control or alignment control. 6. The method of claim 1 , wherein the predicted IPD for the given wafer is utilized as control input for controlling at least one of: a Rapid Thermal Processing (RTP) process, a Chemical-Mechanical Planarization (CMP) process, or a Chemical Vapor Deposition (CVD) process. 7. The method of claim 1 , further comprising: selectively masking off at least one non-functional space on at least one of: a front, a back and a shape image map of the given wafer. 8. A system for providing in-plane distortion (IPD) prediction for a given wafer, the system comprising: an optical system configured for obtaining a wafer shape of the given wafer; and an IPD prediction module in communication with the optical system, the IPD prediction module configured for: (a) generating a series of Zernike basis wafer shapes; (b) performing finite element (FE) model based IPD prediction for the series of Zernike basis wafer shapes; (c) performing higher order shape (HOS) based IPD prediction for the series of Zernike basis wafer shapes; (d) comparing the FE model based IPD prediction and the HOS based IPD prediction of a particular Zernike basis wafer shape of the series of Zernike basis wafer shapes to determine whether said particular Zernike basis wafer shape produces large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction; (e) storing the Zernike basis wafer shapes that produce large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction; and (f) configuring a process tool to compensate for at least one of overlay error or misalignment based on a HOS based IPD prediction for a given wafer utilizing the stored Zernike basis wafer shapes. 9. The system of claim 8 , wherein providing the HOS based IPD prediction for the given wafer utilizing the stored Zernike basis wafer shapes further comprises: obtaining a wafer shape image of the given wafer; performing HOS based IPD prediction for the wafer shape image of the given wafer; decomposing the wafer shape image to a linear combination of Zernike basis images; identifying, among the linear combination of Zernike basis images, a subset of Zernike basis images that produce large prediction differences, wherein the subset of Zernike basis images that produce large prediction differences are identified based on the stored Zernike basis wafer shapes; and combining the FE model based IPD prediction for each one of the subset of Zernike basis images that produce large prediction differences to the HOS based IPD prediction result for the given wafer. 10. The system of claim 8 , wherein a particular Zernike basis wafer shape is identified as a Zernike basis wafer shape that produces large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction when the prediction differences exceed a predetermined threshold. 11. The system of claim 8 , wherein the IPD prediction module performs steps (a) through (e) as a part of a prediction process and performs step (f) independently from steps (a) through (e). 12. The system of claim 8 , wherein the IPD prediction module performs step (f) prior to and after a wafer patterning process for at least one of: overlay error control or alignment control. 13. The system of claim 8 , wherein the predicted IPD for the given wafer is utilized as control input to a downstream application, and wherein the downstream application includes at least one of: a Rapid Thermal Processing (RTP) process, a Chemical-Mechanical Planarization (CMP) process, or a Chemical Vapor Deposition (CVD) process. 14. The system of claim 8 , wherein the IPD prediction module is further configured for selectively masking off at least one non-functional space on at least one of: a front, a back and a shape image map of the given wafer. 15. A computer implemented method for overlay error prediction, the method comprising: (a) generating, with one or more processors, a series of Zernike basis wafer shapes; (b) performing, with the one or more processors, finite element (FE) model based IPD prediction for the series of Zernike basis wafer shapes; (c) performing, with the one or more processors, higher order shape (HOS) based IPD prediction for the series of Zernike basis wafer shapes; (d) comparing, with the one or more processors, the FE model based IPD prediction and the HOS based IPD prediction of a particular Zernike basis wafer shape of the series of Zernike basis wafer shapes to determine whether said particular Zernike basis wafer shape produces large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction; (e) storing, in memory, the Zernike basis wafer shapes that produce large prediction differences between the FE model based IPD prediction and the HOS based IPD prediction; (f) performing, with the one or more

Assignees

Inventors

Classifications

  • Monitoring of warpages, curvatures, damages, defects or the like · CPC title

  • G06F30/23Primary

    using finite element methods [FEM] or finite difference methods [FDM] · CPC title

  • Electricity · mapped topic

  • Physics · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10025894B2 cover?
Systems and methods for prediction of in-plane distortions (IPD) due to wafer shape in semiconductor wafer chucking process is disclosed. A series of Zernike basis wafer shapes process to emulate the non-linear finite element (FE) contact mechanics model based IPD prediction is utilized in accordance with one embodiment of the present disclosure. The emulated FE model based prediction process i…
Who is the assignee on this patent?
Kla Tencor Corp
What technology area does this patent fall under?
Primary CPC classification G06F30/23. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).