Method for processing a measured-value signal determined in an analog manner, a resolver system for implementing the method and a method for determining an output current of a converter

Patent metadata

Field	Value
Publication number	US-10454494-B2
Application number	US-201615144601-A
Country	US
Kind code	B2
Filing date	May 2, 2016
Priority date	Aug 26, 2009
Publication date	Oct 22, 2019
Grant date	Oct 22, 2019

Abstract

In method for processing a measured-value signal determined in an analog manner and a resolver system for implementing the method, the measured-value signal being supplied to a delta-sigma modulator, which makes a bit stream, particularly a one-bit data stream, available on the output side, in particular, whose moving average corresponds to the measured-value signal, the bit stream being supplied to a first digital filter, which converts the bit stream into a stream of digital intermediate words, that is a multibit data stream, the first digital filter having three serially arranged differentiators, the bit stream being clocked at a clock frequency f S , that is, at a clock-pulse period T S =1/f S , and therefore the stream of digital intermediate words being clocked, and thus updated, at a clock-pulse frequency f D , that is, at a clock-pulse period T D =1/f D , the output signal of the first digital filter being supplied to a second digital filter, the second digital filter having as its output data-word stream the difference between a first and a second result data-word stream, the first and second result data-word stream being determined around a first and second time interval from the intermediate data-word stream, the first and second time interval being situated at a distance in time T 1 , the first result data-word stream being determined as a time-discrete second derivation with time scale TD and the second result data-word stream being determined as a time-discrete second derivation with time scale TD.

First claim

What is claimed is:

1. A method for processing a measured-value signal determined in an analog manner, comprising:
supplying the measured-value signal to a delta-sigma modulator, which makes a bit stream available on an output side;
supplying the bit stream to a first digital filter, the first digital filter having a number n of serially arranged accumulators, n being a whole number and equal to at least 1;
converting the bit stream, by the first digital filter, into a stream of digital intermediate words, the bit stream being clocked at a clock-pulse frequency fS and a clock-pulse period TS=1/fS, and the stream of digital intermediate words being clocked and updated at the clock-pulse frequency fS and the clock-pulse period TS=1/fS; and
supplying an output signal of the first digital filter to a second digital filter.

2. The method according to claim 1 , wherein the bit stream includes a one-bit data stream.

3. The method according to claim 1 , wherein the stream of digital intermediate words includes a multi-bit data stream.

4. The method according to claim 1 , wherein the serially arranged accumulators include integrators.

5. A method for processing a measured-value signal determined in an analog manner, comprising:
supplying the measured-value signal to a delta-sigma modulator, which makes a bit stream available on an output side;
supplying the bit stream to a first digital filter, the first digital filter having a number n of serially arranged accumulators, n being a whole number and equal to at least 1;
converting the bit stream, by the first digital filter, into a stream of digital intermediate words, the bit stream being clocked at a clock-pulse frequency fS and a clock-pulse period TS=1/fS, and the stream of digital intermediate words being clocked and updated at the clock-pulse frequency fS and the clock-pulse period TS=1/fS; and
supplying an output signal of the first digital filter to a second digital filter;
wherein the second digital filter produces a difference between a first and a second result data-word stream as an output data-word stream, the first and second result data-word stream being determined over a first and second time interval from the intermediate data-word stream, the first and second time interval being situated at a distance in time T 1 , the first result data-word stream being determined from the intermediate data-word stream as a time discrete differential of the (n−1)th order at time scale TD, and the second result data-word stream being determined from the intermediate data-word stream as a time-discrete differential of the (n−1)th order at time scale TD, the distance in time T 1 being alterable to at least one of (a) being greater than the time scale TD, (b) being an integral multiple of clock-pulse period TS, and (c) not being an integral multiple of time scale TD.

6. A resolver system adapted to detect an angular position of a rotor in relation to a stator, the rotor bearing a rotor coil and the stator having two stator coils that are mutually shifted in a circumferential direction by 90°, the rotor coil having a carrier signal produced by a carrier signal generator applied to it, wherein each signal occurring at a respective stator coil is supplied as a respective measured-value signal to a respective processing channel, the resolver system adapted to perform the method recited in claim 1 .

7. A method for processing a measured-value signal determined in an analog manner, comprising:
supplying the measured-value signal to a delta-sigma modulator, which makes a bit stream available on an output side, at least one of (a) an average value and (b) a moving average corresponding to the measured-value signal;
supplying the bit stream to a first digital filter that converts the bit stream into a stream of digital intermediate words, the first digital filter having a number n of serially disposed accumulators, where n is an integer and is at least 1, the bit stream being clocked at a clock-pulse frequency fS and a clock-pulse period TS=1/fS, and the stream of digital intermediate words being clocked and updated at the clock-pulse frequency fS and the clock-pulse period TS=1/fS; and
supplying an output signal of the first digital filter to a second digital filter.

8. The method according to claim 7 , wherein the bit stream includes a one-bit data stream.

9. The method according to claim 7 , wherein the stream of digital intermediate words includes a multi-bit data stream.

10. The method according to claim 7 , wherein the serially disposed accumulators include integrators.

11. A method for processing a measured-value signal determined in an analog manner, comprising:
supplying the measured-value signal to a delta-sigma modulator, which makes a bit stream available on an output side, at least one of (a) an average value and (b) a moving average corresponding to the measured-value signal;
supplying the bit stream to a first digital filter that converts the bit stream into a stream of digital intermediate words, the first digital filter having a number n of serially disposed accumulators, where n is an integer and is at least 1, the bit stream being clocked at a clock-pulse frequency fS and a clock-pulse period TS=1/fS, and the stream of digital intermediate words being clocked and updated at the clock-pulse frequency fS and the clock-pulse period TS=1/fS; and
supplying an output signal of the first digital filter to a second digital filter;
wherein the second digital filter produces a difference between a first and a second result data-word stream as an output data-word stream, the first and second result data-word streams being determined from the intermediate data-word stream over a first and second time interval, the first and second time intervals being situated at a distance in time T 1 , the first result data-word stream being determined from a double of the intermediate data word belonging to a first instant, the intermediate data word located at the distance in time TD prior to the first instant and the intermediate data word located at the distance in time TD after the first instant being subtracted, the second result data-word stream being determined from a double of the intermediate data word belonging to a second instant, the intermediate data word located at the distance in time TD prior to the second instant and the intermediate data word located at the distance in time TD after the second instant being subtracted, the distance in time T 1 being alterable to at least one of (a) being greater than the time scale TD, (b) being an integral multiple of clock-pulse period TS, and (c) not being an integral multiple of time scale TD.

12. The method according to claim 11 , wherein T 1 is greater than or equal to a double of TD.

13. The method according to claim 11 , wherein the clock-pulse period duration TD is an integral multiple of TS.

14. The method according to claim 7 , wherein the first digital filter includes three integrators or accumulators disposed directly one after another.

15. The method according to claim 7 , wherein the moving average of the bit stream corresponds to the measured-value signal.

16. The method according to claim 7 , wherein the clock-pulse period used in the delta-sigma modulator is applied to a clock-pulse input of the first digital filter.

17. The method according to claim 7 , wherein a carrier signal generator produces a pulse-width-modulated signal, which is supplied to a rotor coil and substantially represents a sine signal.

18. A resolver system adapted to detect an angular posi

Assignees

• Sew Eurodrive Gmbh & Co

Inventors

• Hammel Wolfgang
• Neumayer Ulrich

Classifications

• H03M3/462 Primary

  Details relating to the decimation process (decimation filters in general H03H17/0416, H03H17/0621) · CPC title

• H03M1/66

  Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/645

  for position encoding, e.g. using resolvers or synchros (H03M1/485 takes precedence) · CPC title

• H03M1/661

  Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal, e.g. by interpolation, by curve-fitting, by smoothing · CPC title