Location-specific tuning of stress to control bow to control overlay in semiconductor processing

Patent metadata

Field	Value
Publication number	US-10453692-B2
Application number	US-201715695957-A
Country	US
Kind code	B2
Filing date	Sep 5, 2017
Priority date	Sep 5, 2016
Publication date	Oct 22, 2019
Grant date	Oct 22, 2019

Abstract

Techniques herein include systems and methods for correcting pattern overlay errors by correcting or adjusting bowing of wafers. Location-specific tuning of stress on semiconductor substrates reduces overlay error. Location-specific tuning of stress independently modifies specific regions, areas, or point locations on a substrate to change wafer bow at those specific locations, which reduces overlay error on substrates, which in turn improves overlay of subsequent patterns created on the substrate. Techniques herein include receiving a substrate with some amount of overlay error, measuring bow of the substrate to map z-height deviations across the substrate, generating an overlay correction pattern, and then physically modifying internal stresses on the substrate at specific locations with modifications independent of other coordinate locations. Such modifications can include etching a backside surface of the substrate. One or more processing modules can be used for such processing.

First claim

The invention claimed is:

1. A system for correcting wafer overlay, the system comprising:
a metrology module configured to measure bow of a substrate and generate a bow measurement that maps z-height deviations on the substrate relative to one or more reference z-height values, the substrate having a working surface and having a backside surface opposite to the working surface, the substrate having an initial overlay error resulting from one or more micro fabrication processing steps that have been executed to create at least part of a semiconductor device on the working surface of the substrate;
a controller configured to receive the bow measurement and generate an overlay correction pattern based on the bow measurement, the overlay correction pattern defining adjustments to internal stresses at specific locations on the substrate based on the bow measurement, wherein a first given location on the substrate has a different internal stress adjustment defined as compared to a second given location on the substrate in the overlay correction pattern;
a processing module having a substrate holder and substrate treatment components configured to physically modify internal stresses on the substrate at specific locations on the substrate according to the overlay correction pattern resulting in a modified bow of the substrate, the substrate with the modified bow having a second overlay error, the second overlay error having reduced overlay error as compared to the initial overlay error; and
an automated substrate handling system that automatically moves the substrate from the metrology module to the processing module, wherein the metrology module, the processing module, and the automated substrate handling system are on a common platform.

2. The system of claim 1 , wherein the processing module is configured to differentially modify internal stresses in that the processing module is configured to independently modify different locations on the substrate such that at least a portion of the different locations are modified differently as compared to each other.

3. The system of claim 1 , wherein the processing module is configured to increase or relax internal stresses at locations on the substrate.

4. The system of claim 1 , wherein the processing module is configured to physically modify internal stresses on the working surface of the substrate.

5. The system of claim 1 , wherein the processing module is configured to physically modify internal stresses on the backside surface of the substrate.

6. The system of claim 1 , wherein the processing module is configured to hold the substrate with the working surface facing upwardly while physically modifying internal stresses on the backside surface of the substrate.

7. The system of claim 1 , wherein the processing module is configured to modify internal stresses on the substrate by location-specific addition of material on the backside surface of the substrate in that the first given location on the substrate can have more material added as compared to the second given location.

8. The system of claim 1 , wherein the processing module is configured to modify internal stresses on the substrate by location-specific removal of material on the backside surface of the substrate in that the first given location on the substrate can have more material removed as compared to the second given location.

9. The system of claim 8 , wherein the processing module is configured to add one or more films to the backside surface of the substrate and then selectively remove material from the one or more films at given locations.

10. The system of claim 1 , wherein the processing module is configured to modify internal stresses on the substrate by location-specific implantation of particles into the backside surface of the substrate in that the first given location on the substrate can have more particles implanted as compared to the second given location.

11. The system of claim 1 , wherein the processing module is configured to modify internal stresses on the substrate by location-specific temperature modulation of a curing film.

12. The system of claim 1 , wherein the controller is configured to generate the overlay correction pattern based on device parameters of the working surface in addition to the bow measurement.

13. The system of claim 1 , wherein the controller is configured to generate the overlay correction pattern using a calculation method selected from the group consisting of inter-plane deviation, z-height deviation from reference plane, multi-order derivative analysis for location of interest, analysis of Zernike polynomial, pixelated base functions optimization, and spherical Bessel functions.

14. A system for correcting wafer overlay, the system comprising:
a metrology module configured to measure bow of a substrate and generate a bow measurement that maps z-height deviations on the substrate relative to one or more reference z-height values, the substrate having a working surface and having a backside surface opposite to the working surface, the substrate having an initial overlay error resulting from one or more micro fabrication processing steps that have been executed to create at least part of a semiconductor device on the working surface of the substrate;
a controller configured to receive the bow measurement and generate an overlay correction pattern based on the bow measurement, the overlay correction pattern defining adjustments to internal stresses at specific locations on the substrate based on the bow measurement, wherein a first given location on the substrate has a different internal stress adjustment defined as compared to a second given location on the substrate in the overlay correction pattern; and
a processing module having a substrate holder and substrate treatment components configured to physically modify internal stresses on the substrate at specific locations on the substrate according to the overlay correction pattern resulting in a modified bow of the substrate, the substrate with the modified bow having a second overlay error, the second overlay error having reduced overlay error as compared to the initial overlay error, wherein the processing module is configured to modify internal stresses on the substrate by location-specific addition of material on the backside surface of the substrate in that the first given location on the substrate can have more material added as compared to the second given location.

15. The system of claim 14 , wherein the processing module is configured to hold the substrate with the working surface facing upwardly while physically modifying internal stresses on the backside surface of the substrate.

16. A system for correcting wafer overlay, the system comprising:
a metrology module configured to measure bow of a substrate and generate a bow measurement that maps z-height deviations on the substrate relative to one or more reference z-height values, the substrate having a working surface and having a backside surface opposite to the working surface, the substrate having an initial overlay error resulting from one or more micro fabrication processing steps that have been executed to create at least part of a semiconductor device on the working surface of the substrate;
a controller configured to receive the bow measurement and generate an overlay correction pattern based on the bow measurement, the overlay correction pattern defining adjustments to internal stresses at specific locations on the substrate based on the bow measurement, wherein a first given location on the substrate has a different internal stress adju

Assignees

• Tokyo Electron Ltd

Inventors

• Devilliers Anton J
• Fulford Daniel

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P76/00

  Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography · CPC title

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/27

  Structural arrangements therefor · CPC title

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title