Method of inspecting wafer using electron beam

US10373796B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10373796-B2
Application numberUS-201615084059-A
CountryUS
Kind codeB2
Filing dateMar 29, 2016
Priority dateMar 30, 2015
Publication dateAug 6, 2019
Grant dateAug 6, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A method of inspecting a wafer may include: loading of a wafer onto a stage, the wafer having a plurality of dies thereon; positioning of the wafer such that a plurality of electron beam columns on the wafer respectively face a partial region of each of the plurality of dies on the wafer; scanning the respective partial regions of each of the plurality of dies by using the electron beam columns; and combining a plurality of partial images that are obtained by scanning the partial regions to provide a die image.

First claim

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What is claimed is: 1. A method of inspecting a wafer, comprising: loading a wafer onto a stage, the wafer having a plurality of dies thereon; positioning the wafer such that a plurality of spaced-apart electron beam columns face a corresponding plurality of spaced-apart and different partial regions on the plurality of dies; scanning the plurality of different partial regions on the plurality of dies in parallel using the plurality of spaced-apart electron beam columns to thereby generate a corresponding plurality of partial images of the plurality of dies, wherein the plurality of partial regions included in a first die of the plurality of die completely constitutes the first die; and combining the plurality of partial images of the plurality of dies to generate an image of a composite die defined by the plurality of partial images. 2. The method of claim 1 , wherein the positioning of the wafer comprises rotating the wafer. 3. The method of claim 2 , further comprising: rotating scanning directions of the stage and the electron beam columns until the scanning direction of the stage is perpendicular to an edge of at least one of the dies and the scanning directions of the electron beam columns are perpendicular to the scanning direction of the stage. 4. The method of claim 3 , wherein a rotation angle of the scanning directions of the stage and a rotation angle of the scanning directions of the electron beam columns are equal to a rotation angle of the wafer. 5. The method of claim 3 , wherein a rotation angle of the scanning directions of the stage is determined based on movement speeds of the stage in an X-axis direction and a Y-axis direction of the stage. 6. The method of claim 2 , wherein the positioning of the wafer is simultaneously performed with the loading by loading the previously rotated wafer on the stage. 7. The method of claim 2 , wherein the wafer is rotated by a rotation stage formed on the stage. 8. The method of claim 1 , wherein the positioning of the wafer comprises rotating alignment directions of the electron beam columns. 9. The method of claim 8 , further comprising rotating scanning directions of the electron beam columns until the scanning directions of the electron beam columns are perpendicular to a scanning direction of the stage. 10. The method of claim 1 , wherein said combining is followed by detecting a defect in the composite die by comparing the image of the composite die with design data. 11. A method of inspecting a wafer, comprising: generating a plurality of electron beam columns such that each of the plurality of electron beam columns face a corresponding partial region of each of a plurality of dies on the wafer; scanning the corresponding partial region of each of the plurality of dies, in parallel, using the plurality of electron beam columns to thereby generate a scanned image of each of the corresponding partial regions of the plurality of dies, wherein the scanned image of each of the corresponding partial regions of each of plurality of dies do not overlap each other; and combining the scanned image of each of the corresponding partial regions of the plurality of dies into a complete image of a die comprising distinct portions of each of the plurality of dies scanned by the plurality of electron beam columns. 12. The method of claim 11 , wherein the scanning comprises rotating scanning directions of at least one of a stage on which the wafer is positioned and the electron beam columns until a scanning direction of the stage is perpendicular to an edge of at least one of the dies and the scanning directions of the electron beam columns are perpendicular to the scanning direction of the stage. 13. The method of claim 11 , further comprising comparing the complete image of the die to design data, and detecting a defect pattern based on the comparison. 14. The method of claim 13 , further comprising identifying at least one pattern group that is displayed repeatedly in the design data and determining a defect ratio of the at least one pattern group through the defect of the pattern displayed in the complete image of the die. 15. A wafer inspection method, comprising: scanning, in parallel, a first of partial region of a first die and second partial region of second die within the wafer using a corresponding plurality of spaced-apart electron beam columns, to generate first partial image of the first partial region of the first die and second partial image of the second partial region of the second die, wherein the first and second dies are equally designed and the first and second partial regions are differently designed; and attaching the first and second partial images into a composite image of a die, said composite image comprising the first partial image of the first die and the second partial image of the second die. 16. The method of claim 15 , wherein the first and second dies have equivalent layouts of integrated circuits therein. 17. The method of claim 16 , wherein the first partial image of the first die is of a first region of the first die; wherein the second partial image of the second die is of a second region of the second die; and wherein the first and second regions are immediately adjacent regions within the composite image of a die. 18. The method of claim 17 , further comprising comparing the composite image of the die to design data and detecting a defect pattern based on the comparison. 19. The method of claim 15 , further comprising comparing the composite image of the die to design data and detecting a defect pattern based on the comparison. 20. The method of claim 15 , wherein the first partial image of the first die is of a first region of the first die; wherein the second partial image of the second die is of a second region of the second die; and wherein the first and second regions are immediately adjacent regions within the composite image of a die.

Assignees

Inventors

Classifications

  • Pattern inspection · CPC title

  • H01J37/222Primary

    Image processing arrangements associated with the tube · CPC title

  • Image reconstruction · CPC title

  • Means for supporting or positioning the object or the material; Means for adjusting diaphragms or lenses associated with the support · CPC title

  • with scanning beams {(H01J37/268, H01J37/292, H01J37/2955 take precedence)} · CPC title

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What does patent US10373796B2 cover?
A method of inspecting a wafer may include: loading of a wafer onto a stage, the wafer having a plurality of dies thereon; positioning of the wafer such that a plurality of electron beam columns on the wafer respectively face a partial region of each of the plurality of dies on the wafer; scanning the respective partial regions of each of the plurality of dies by using the electron beam columns…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01J37/222. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 06 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).