Reconfiguration of address space based on loading short pointer mode application

US9836291B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9836291-B1
Application numberUS-201615216896-A
CountryUS
Kind codeB1
Filing dateJul 22, 2016
Priority dateJul 22, 2016
Publication dateDec 5, 2017
Grant dateDec 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A short pointer mode application has been loaded. Based on determining that the short pointer mode application has been loaded, an address space configured for a long pointer mode environment is reconfigured. The address space has one portion addressable by short pointers of a defined size and another portion addressable by long pointers of another defined size, and the reconfiguring includes obtaining a long pointer library, and loading the long pointer library in the one portion of the address space addressable by short pointers.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product for facilitating processing in a computing environment, said computer program product comprising: a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: determining that a short pointer mode application has been loaded; reconfiguring, based on determining the short pointer mode application has been loaded, an address space configured for a long pointer mode environment, the address space having one portion addressable by short pointers of a defined size and another portion addressable by long pointers of another defined size, the reconfiguring comprising: obtaining a long pointer library; and loading the long pointer library in the one portion of the address space addressable by short pointers; obtaining a select library to load; loading the select library in the one portion of the address space or the other portion of the address space, based on the select library not being a short pointer library; and modifying by the select library one or more characteristics of the select library for the select library to be operable in a short mode environment. 2. The computer program product of claim 1 , wherein the short pointer mode application is loaded in the one portion of the address space addressable by short pointers. 3. The computer program product of claim 1 , wherein the reconfiguring further comprises configuring a stack in the one portion of the address space addressable by short pointers. 4. The computer program product of claim 1 , wherein the reconfiguring further comprises configuring a heap in the one portion of the address space addressable by short pointers. 5. The computer program product of claim 1 , wherein the method further comprises: determining whether the select library is a short pointer library; and loading the select library in the one portion of the address space addressable by short pointers, based on the select library being a short pointer library. 6. The computer program product of claim 5 , wherein the method further comprises loading the select library in the other portion of the address space, based on the select library not being a short pointer library. 7. The computer program product of claim 1 , wherein the defined size is one of 31 bits or 32 bits, and the other defined size is 64 bits. 8. The computer program product of claim 1 , wherein the determining includes checking a field associated with the application. 9. The computer program product of claim 1 , wherein a pointer of the long pointer library is a procedure linkage table pointer, and the procedure linkage table pointer is a long pointer. 10. A computer system for facilitating processing in a computing environment, said computer system comprising: a memory; and a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising: determining that a short pointer mode application has been loaded; and reconfiguring, based on determining the short pointer mode application has been loaded, an address space configured for a long pointer mode environment, the address space having one portion addressable by short pointers of a defined size and another portion addressable by long pointers of another defined size, the reconfiguring comprising: obtaining a long pointer library; and loading the long pointer library in the one portion of the address space addressable by short pointers; obtaining a select library to load; loading the select library in the one portion of the address space or the other portion of the address space, based on the select library not being a short pointer library; and modifying by the select library one or more characteristics of the select library for the select library to be operable in a short mode environment. 11. The computer system of claim 10 , wherein the short pointer mode application is loaded in the one portion of the address space addressable by short pointers. 12. The computer system of claim 10 , wherein the reconfiguring further comprises configuring a stack in the one portion of the address space addressable by short pointers. 13. The computer system of claim 10 , wherein the reconfiguring further comprises configuring a heap in the one portion of the address space addressable by short pointers. 14. A computer-implemented method of facilitating processing in a computing environment, said computer-implemented method comprising: determining, by a processor, that a short pointer mode application has been loaded; and reconfiguring, based on determining the short pointer mode application has been loaded, an address space configured for a long pointer mode environment, the address space having one portion addressable by short pointers of a defined size and another portion addressable by long pointers of another defined size, the reconfiguring comprising: obtaining a long pointer library; and loading the long pointer library in the one portion of the address space addressable by short pointers; obtaining a select library to load; loading the select library in the one portion of the address space or the other portion of the address space, based on the select library not being a short pointer library; and modifying by the select library one or more characteristics of the select library for the select library to be operable in a short mode environment. 15. The computer-implemented method of claim 14 , wherein the short pointer mode application is loaded in the one portion of the address space addressable by short pointers. 16. The computer-implemented method of claim 14 , wherein the reconfiguring further comprises configuring a stack in the one portion of the address space addressable by short pointers. 17. The computer-implemented method of claim 14 , wherein the reconfiguring further comprises configuring a heap in the one portion of the address space addressable by short pointers.

Assignees

Inventors

Classifications

  • Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading · CPC title

  • G06F8/447Primary

    Target code generation · CPC title

  • G06F8/441Primary

    Register allocation; Assignment of physical memory space to logical memory space · CPC title

  • Configuring for program initiating, e.g. using registry, configuration files · CPC title

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What does patent US9836291B1 cover?
A short pointer mode application has been loaded. Based on determining that the short pointer mode application has been loaded, an address space configured for a long pointer mode environment is reconfigured. The address space has one portion addressable by short pointers of a defined size and another portion addressable by long pointers of another defined size, and the reconfiguring includes o…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F8/447. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).