Printed circuit board and method of manufacturing the same

US10193055B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10193055-B2
Application numberUS-201514954284-A
CountryUS
Kind codeB2
Filing dateNov 30, 2015
Priority dateDec 2, 2014
Publication dateJan 29, 2019
Grant dateJan 29, 2019

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board includes: insulating layers and wiring layers arranged in stacked configuration; a cavity disposed in a first insulating layer among the insulating layers; a piezoelectric substrate disposed in the cavity; an electrode disposed on the piezoelectric substrate and configured to convert an electrical signal into an elastic wave or to convert an elastic wave into an electrical signal; and a sealing part disposed on the piezoelectric substrate, the sealing part enclosing the electrode and forming an air gap around the electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed circuit board comprising: a first insulating layer; a first wiring layer disposed on an upper surface of the first insulating layer; a second insulating layer disposed above the first insulating layer, and on the first wiring layer; a second wiring layer disposed on an upper surface of the second insulating layer; a cavity disposed in the first insulating layer; a piezoelectric substrate disposed in the cavity; an electrode disposed on the piezoelectric substrate and configured to convert an electrical signal into an elastic wave or to convert an elastic wave into an electrical signal; a first via extending through the second insulating layer and into the first insulating layer, and electrically connecting the electrode to the second wiring layer; a second via extending through the second insulating layer and electrically connecting the first wiring layer to the second wiring layer; and a sealing part disposed on the piezoelectric substrate, the sealing part enclosing the electrode and forming an air gap around the electrode. 2. The printed circuit board of claim 1 , wherein the sealing part comprises a non-conductive material. 3. The printed circuit board of claim 1 , wherein the air gap is filled with an electrode corrosion inhibitor. 4. The printed circuit board of claim 1 , wherein the electrode includes an interdigital transducer (IDT). 5. The printed circuit board of claim 1 , wherein the first insulating layer is a core layer. 6. A printed circuit board comprising: a core layer comprising a cavity; an elastic wave element disposed in the cavity, and comprising: a piezoelectric substrate; an IDT disposed on the piezoelectric substrate, and a sealing part disposed on the piezoelectric substrate, the sealing part enclosing the IDT and forming an air gap around the IDT; a first wiring layer disposed on an upper surface of the core layer; an insulating layer disposed above the core layer and on the first wiring layer; a second wiring layer disposed on an upper surface of the second insulating layer; a first via extending through the insulating layer and into the core layer, and electrically connecting the IDT to the second wiring layer; and a second via penetrating through the insulating layer and electrically connecting the first wiring layer to the second wiring layer. 7. The printed circuit board of claim 6 , wherein the sealing part comprises a non-conductive material. 8. The printed circuit board of claim 6 , wherein the air gap is filled with an electrode corrosion inhibitor. 9. A method of manufacturing a printed circuit board, the method comprising: forming a cavity in a core layer; forming a piezoelectric substrate in the cavity; forming an electrode on the piezoelectric substrate, the electrode being configured to convert an electrical signal into an elastic wave or an elastic wave into an electrical signal; forming a sealing part on the piezoelectric substrate to enclose the electrode and form an air gap around the electrode; forming a first wiring layer on an upper surface of the core layer; forming an insulating layer above the core layer and on the first wiring layer; forming a second wiring layer on an upper surface of the insulating layer; forming a first via in the insulating layer and the core layer, the first via electrically connecting the electrode to the second wiring layer; and forming a second via in the insulating layer, the second via electrically connecting the first wiring layer to the second wiring layer. 10. The method of claim 9 , wherein the electrode comprises an IDT. 11. The method of claim 9 , wherein the sealing part comprises a non-conductive material. 12. The method of claim 9 , further comprising adjusting a thickness of the piezoelectric substrate or a thickness of the sealing part to control a size of the air gap. 13. The method of claim 9 , further comprising filling the air gap with an electrode corrosion inhibitor. 14. The method of claim 9 , wherein the forming of the piezoelectric substrate comprises injecting a piezoelectric material into the cavity and hardening the piezoelectric material. 15. The method of claim 9 , wherein the forming of the cavity comprises forming the cavity using a laser beam, a punch, or a blade. 16. A method of manufacturing a printed circuit board, the method comprising: forming a cavity in a core layer; forming a piezoelectric substrate in the cavity by injecting a piezoelectric material into the cavity and hardening the piezoelectric material; forming an electrode on the piezoelectric substrate, the electrode being configured to convert an electrical signal into an elastic wave or an elastic wave into an electrical signal; forming a sealing part on the piezoelectric substrate to enclose the electrode and form an air gap around the electrode; forming insulating layers above and below the core layer; and forming wiring layers on the insulating layers. 17. A method of manufacturing a printed circuit board, the method comprising: forming a cavity in a core layer using a laser beam, a punch, or a blade; forming a piezoelectric substrate in the cavity; forming an electrode on the piezoelectric substrate, the electrode being configured to convert an electrical signal into an elastic wave or an elastic wave into an electrical signal; forming a sealing part on the piezoelectric substrate to enclose the electrode and form an air gap around the electrode; forming insulating layers above and below the core layer; and forming wiring layers on the insulating layers.

Assignees

Inventors

Classifications

  • having cavities, e.g. for mounting components (H05K3/4691 takes precedence) · CPC title

  • H05K3/46Primary

    Manufacturing multilayer circuits · CPC title

  • incorporating printed electric components, e.g. printed resistors, capacitors or inductors · CPC title

  • structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title

  • characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated · CPC title

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Frequently asked questions

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What does patent US10193055B2 cover?
A printed circuit board includes: insulating layers and wiring layers arranged in stacked configuration; a cavity disposed in a first insulating layer among the insulating layers; a piezoelectric substrate disposed in the cavity; an electrode disposed on the piezoelectric substrate and configured to convert an electrical signal into an elastic wave or to convert an elastic wave into an electric…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H05K3/46. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 29 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).