Semiconductor device and mounting structure for semiconductor element
US-2024170353-A1 · May 23, 2024 · US
US9095083B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9095083-B2 |
| Application number | US-201314074655-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 7, 2013 |
| Priority date | Nov 7, 2013 |
| Publication date | Jul 28, 2015 |
| Grant date | Jul 28, 2015 |
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A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed.
Opening claim text (preview).
What is claimed is: 1. A manufacturing method for a multi-layer circuit board, comprising: providing a substrate having a first via penetrating the substrate; forming a first patterned circuit layer on a surface of the substrate by using the first via as an alignment target, and the first patterned circuit layer including a first concentric-circle pattern surrounding the first via; forming a first stacking layer on the surface and covering the first patterned circuit layer, an…
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