Method of manufacturing a wiring board having via structures

US9107314B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9107314-B2
Application numberUS-201313799221-A
CountryUS
Kind codeB2
Filing dateMar 13, 2013
Priority dateMar 16, 2012
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a wiring board includes: forming an outer through hole in a core substrate; filling the outer through hole with an insulation resin; forming a first conductive layer on a surface of the insulation resin at a portion where a core connecting via is formed; forming a land around the first conductive layer; laminating the wiring layer on the core substrate after the forming of the first conductive layer and the forming of the land; forming an inner through hole having a smaller diameter than that of the outer through hole and penetrating through the core substrate and the wiring layer so as to penetrate through the insulation resin; and coating a first conductive film on an inner wall surface of the inner through hole, in which the core substrate and the first conductive film are electrically connected through the first conductive layer and the land.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a wiring board including a core substrate having conductivity and a plurality of penetrating-through hole vias, the method comprising: forming an outer through hole that penetrates through the core substrate at a portion of the core substrate where a penetrating-through hole via is to be formed; filling the outer through hole with an insulation resin; forming a first conductive layer on a surface portion of the insulation resin…

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What does patent US9107314B2 cover?
A method of manufacturing a wiring board includes: forming an outer through hole in a core substrate; filling the outer through hole with an insulation resin; forming a first conductive layer on a surface of the insulation resin at a portion where a core connecting via is formed; forming a land around the first conductive layer; laminating the wiring layer on the core substrate after the formin…
Who is the assignee on this patent?
Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H05K1/115. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).