Wafer level integration including design/co-design, structure process, equipment stress management, and thermal management
US-2018082888-A1 · Mar 22, 2018 · US
Wafer level integration for embedded cooling
US10170392B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10170392-B2 |
| Application number | US-201715479810-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 5, 2017 |
| Priority date | Apr 5, 2017 |
| Publication date | Jan 1, 2019 |
| Grant date | Jan 1, 2019 |
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- Title
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Abstract
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Techniques for wafer level integration of embedded cooling structures for integrated circuit devices are provided. In one embodiment, a method includes forming channel structures on a first surface of a silicon first wafer, wherein the channel structures respectively include radial channels that extend from central fluid distribution areas, and wherein integrated circuits are formed on a second surface of the silicon first wafer that opposes the first surface. The method can further include bonding a manifold wafer to the first surface of the silicon wafer such that inlet openings formed through the manifold wafer respectively connect to the central fluid distribution areas, thereby enclosing the radial channels and forming a bonded structure.
First claim
Opening claim text (preview).
What is claimed is: 1. A device, comprising: a silicon wafer, comprising: channel structures formed on a first surface of a silicon first wafer, wherein the channel structures respectively comprise radial channels that extend from central fluid distribution areas; and integrated circuits formed on a second surface of the silicon first wafer that opposes the first surface; and a manifold wafer bonded to the first surface of the silicon wafer, wherein portions of the manifold wafer enclose the radial channels and wherein inlet openings formed through the manifold wafer respectively connect to the central fluid distribution areas. 2. The device of claim 1 , further comprising: a thermally conductive bonding layer formed between the silicon wafer and the manifold wafer. 3. The device of claim 1 , wherein the silicon wafer comprises a plurality of integrated circuits formed on the silicon wafer. 4. The device of claim 1 , wherein the silicon wafer comprises a plurality of integrated circuits formed within the silicon wafer. 5. The device of claim 1 , further comprising an inlet path that receives liquid coolant, wherein the inlet opening distributes the liquid coolant to the radial channels, outlet openings that expel vapor generated from the liquid coolant within the radial channels into outlet paths. 6. The device of claim 5 , further comprising outlet openings that expel vapor generated from the liquid coolant within the radial channels into outlet paths. 7. The device of claim 2 , wherein the thermally conductive bonding layer is comprised of copper. 8. The device of claim 2 , wherein the thermally conductive bonding layer is comprised of an adhesive. 9. The device of claim 8 , wherein the adhesive comprises a phenoxy thermoplastic adhesive.
Assignees
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Classifications
Seals · CPC title
characterised by their shape · CPC title
batch processes · CPC title
on active surfaces of flip-chip devices, e.g. underfills · CPC title
Bump connectors and die-attach connectors · CPC title
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- What does patent US10170392B2 cover?
- Techniques for wafer level integration of embedded cooling structures for integrated circuit devices are provided. In one embodiment, a method includes forming channel structures on a first surface of a silicon first wafer, wherein the channel structures respectively include radial channels that extend from central fluid distribution areas, and wherein integrated circuits are formed on a second…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H10W40/73. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).