Selective film formation for raised and recessed features using deposition and etching processes

US10115601B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10115601-B2
Application numberUS-201715422128-A
CountryUS
Kind codeB2
Filing dateFeb 1, 2017
Priority dateFeb 3, 2016
Publication dateOct 30, 2018
Grant dateOct 30, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the invention provide a processing method for selective film formation for raised and recessed features using deposition and etching processes. According to one embodiment, the method includes providing a substrate having a recessed feature with a sidewall and a bottom portion, and depositing a film in the recessed feature and on a field area around the opening of the recessed feature, where the film is non-conformally deposited with a greater film thickness on the bottom portion than on the sidewall and the field area. The method further includes etching the film in an atomic layer etching (ALE) process in the absence of a plasma, where the etching thins the film on the bottom portion and removes the film from the sidewall and the field area, and repeating the depositing and the etching at least once to increase the film thickness of on the bottom portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A substrate processing method, comprising: providing a substrate having a recessed feature with a sidewall and a bottom portion; depositing a film in the recessed feature and on a field area around the opening of the recessed feature, wherein the film is non-conformally deposited with a greater film thickness on the bottom portion than on the sidewall and the field area; etching the film in an atomic layer etching (ALE) process in the absence of a plasma, wherein the etching thins the film on the bottom portion and removes the film from the sidewall and the field area; and repeating the depositing and the etching at least once to increase the film thickness on the bottom portion. 2. The method of claim 1 , wherein the film includes a metal oxide film. 3. The method of claim 2 , wherein the ALE process includes sequential gas exposures of trimethylaluminum (TMA) and HF. 4. The method of claim 2 , wherein the metal oxide film is selected from the group consisting of HfO 2 , ZrO 2 , TiO 2 , Al 2 O 3 , and a combination thereof. 5. The method of claim 1 , wherein the film is selected from the group consisting of a metal oxide film, a metal nitride film, a metal oxynitride film, a metal silicate film, and a combination thereof. 6. The method of claim 1 , further comprising following the repeating, overfilling the recessed feature with excess film; and removing the excess film from the field area and the overfilled recessed feature in a planarization process. 7. The method of claim 1 , wherein the bottom portion and the sidewall contain different materials. 8. The method of claim 7 , wherein the different materials are selected from the group consisting of silicon, germanium, silicon germanium, a dielectric material, a metal, and a metal-containing material. 9. The method of claim 7 , wherein the depositing has different film nucleation rates on the different materials. 10. The method of claim 1 , wherein the bottom portion and the sidewall contain the same material. 11. The method of claim 10 , wherein the material is selected from the group consisting of silicon, germanium, silicon germanium, a dielectric material, a metal, and a metal-containing material. 12. The method of claim 1 , wherein the film includes a metal film. 13. The method of claim 1 , The method of claim 1 , wherein the film is selected from the group consisting of Cu, Al, Ta, Ru, TaN, TaC, and TaCN. 14. The method of claim 1 , wherein the repeating is performed until recessed feature is fully filled with the film. 15. A substrate processing method, comprising: providing a substrate having a recessed feature with a sidewall and a bottom portion; depositing a Ru metal film in the recessed feature and on a field area around the opening of the recessed feature, wherein the Ru metal film is non-conformally deposited with a greater film thickness on the bottom portion than on the sidewall and the field area; etching the Ru metal film in an atomic layer etching (ALE) process in the absence of a plasma, wherein the etching removes the Ru metal film from the field area; and repeating the depositing and the etching until the recessed feature is fully filled with the Ru metal film. 16. The method of claim 15 , wherein the bottom portion and the sidewall contain different materials. 17. The method of claim 16 , wherein the different materials are selected from the group consisting of silicon, germanium, silicon germanium, a dielectric material, a metal, and a metal-containing material. 18. The method of claim 16 , wherein the depositing has different film nucleation rates on the different materials. 19. The method of claim 15 , wherein the bottom portion and the sidewall contain the same material. 20. The method of claim 19 , wherein the material is selected from the group consisting of silicon, germanium, silicon germanium, a dielectric material, a metal, and a metal-containing material.

Assignees

Inventors

Classifications

  • characterised by their composition, e.g. multilayer masks or materials · CPC title

  • of Group IV materials · CPC title

  • the material containing aluminium, e.g. Al2O3 · CPC title

  • deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

  • in the presence of a plasma [PECVD] · CPC title

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What does patent US10115601B2 cover?
Embodiments of the invention provide a processing method for selective film formation for raised and recessed features using deposition and etching processes. According to one embodiment, the method includes providing a substrate having a recessed feature with a sidewall and a bottom portion, and depositing a film in the recessed feature and on a field area around the opening of the recessed fe…
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification H10P14/69391. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).