Integrating atomic scale processes: ald (atomic layer deposition) and ale (atomic layer etch)

US2016203995A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016203995-A1
Application numberUS-201514696254-A
CountryUS
Kind codeA1
Filing dateApr 24, 2015
Priority dateJan 12, 2015
Publication dateJul 14, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to protect feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.

First claim

Opening claim text (preview).

1 . A method of processing a substrate, the method comprising: etching the substrate by atomic layer etch in a chamber; and depositing a film by atomic layer deposition in the chamber, wherein the etching and the depositing are performed without breaking vacuum. 2 . The method of claim 1 , wherein the etching is performed in cycles, a cycle comprising exposing a substrate to an etching gas to modify the surface of the substrate; and exposing the substrate to a removal gas to remove at least some of the modified surface. 3 . The method of claim 1 , wherein the depositing is performed in cycles, a cycle comprising exposing the substrate to a deposition precursor to modify the surface of the substrate; and exposing the substrate to a reducing agent to deposit the film. 4 . The method of claim 2 , wherein exposing the substrate to the etching gas further comprises igniting a plasma. 5 . The method of claim 2 , further comprising applying a bias to the substrate. 6 . The method of claim 1 , wherein the etching and the depositing are performed to deposit material on the substrate. 7 . The method of claim 1 , wherein the etching and the depositing are performed to etch material on the substrate. 8 . The method of claim 1 , wherein the etching further comprises directionally sputtering the substrate. 9 . The method of claim 3 , further comprising igniting a plasma. 10 . (canceled) 11 . The method of claim 1 , wherein the etching and the depositing is performed in the same chamber. 12 . The method of claim 1 , wherein the etching is performed nonconformally. 13 . (canceled) 14 . (canceled) 15 . (canceled) 16 . (canceled) 17 . The method of claim 1 , wherein at least one of the etching or the depositing is a self-limiting reaction. 18 . A method comprising: (a) exposing a substrate housed in a chamber to alternating pulses of an etching gas and a removal gas to etch the substrate layer by layer; (b) exposing the substrate to alternating pulses of a first reactant and a second reactant to deposit a film over the substrate; and (c) repeating (a) and (b) in the same chamber. 19 . The method of claim 18 , wherein the removal gas is a carrier gas selected from the group consisting of N 2 , Ar, He, and Ne. 20 . The method of claim 18 , wherein (a) and (b) are performed in the same chamber and are performed sequentially. 21 . (canceled) 22 . The method of claim 18 , wherein (a) further comprises applying a bias to the substrate. 23 . (canceled) 24 . (canceled) 25 . (canceled) 26 . The method of claim 18 , wherein at least one of (a) or (b) is a self-limiting reaction. 27 . The method of claim 18 , wherein (a) and (b) are repeated to deposit material on the substrate. 28 . The method of claim 18 , wherein (a) and (b) are repeated to etch a film on the substrate. 29 . (canceled) 30 . An apparatus for processing substrates, the apparatus comprising: one or more process chambers, each process chamber comprising a chuck; one or more gas inlets into the process chambers and associated flow-control hardware; and a controller having at least one processor and a memory, wherein the at least one processor and the memory are communicatively connected with one another, the at least one processor is at least operatively connected with the flow-control hardware, and the memory stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware by: etching the substrate by atomic layer etch in a chamber; and depositing a film by atomic layer deposition in the chamber, wherein the etching and the depositing are performed without breaking vacuum. 31 . (canceled)

Assignees

Inventors

Classifications

  • of silicon-containing layers · CPC title

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • in the presence of a plasma [PECVD] · CPC title

  • comprising a chamber adapted to a particular process · CPC title

  • for drying etching · CPC title

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Frequently asked questions

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What does patent US2016203995A1 cover?
Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to protect feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P50/244. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).