Power switching system for ESC with array of thermal control elements

Patent metadata

Field	Value
Publication number	US-10049948-B2
Application number	US-201213690745-A
Country	US
Kind code	B2
Filing date	Nov 30, 2012
Priority date	Nov 30, 2012
Publication date	Aug 14, 2018
Grant date	Aug 14, 2018

Abstract

A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

First claim

What is claimed is:

1. A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber, comprising:
a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements configured to be powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the thermal control elements and each power return line is connected to at least two of the thermal control elements;
a power distribution circuit mated to a baseplate of the semiconductor substrate support, the power distribution circuit connected to each power supply line and power return line of the heater array, wherein the power distribution circuit is formed on a first circuit board, the first circuit board having a conductive common plane that is attached to the baseplate and that is at an electrical potential of the baseplate;
a power switching device connected to the power distribution circuit to independently supply power to each one of the thermal control elements via one of the power supply lines and one of the power return lines to provide time-averaged power to each of the thermal control elements by time division multiplexing of a plurality of switches;
at least one capacitor connected between each power supply line and the baseplate and between each power return line and the baseplate to shunt RF between the baseplate and the heater array so that the baseplate and the heater array are at a same RF potential, wherein one end of each capacitor is connected to a power supply line or a power return line and another end of each capacitor is connected to the conductive common plane that is attached to the baseplate; and
a facilities plate attached to the baseplate of the semiconductor substrate support such that at least the power distribution circuit is located in an electrostatically-shielded volume between the baseplate and the facilities plate.

2. The semiconductor substrate support of claim 1 , wherein the power switching device comprises a switching circuit and a control circuit.

3. The semiconductor substrate support of claim 2 , wherein the power switching device is formed on the first circuit board.

4. The semiconductor substrate support of claim 1 , wherein the power switching device is formed on a second circuit board, the second circuit board having a conductive common plane that is attached to the facilities plate and is at a DC potential of the facilities plate.

5. The semiconductor substrate support of claim 4 , wherein the second circuit board is attached to an upper surface of the facilities plate and in a recess of the facilities plate, such that the second circuit board is within the electrostatically-shielded volume between the baseplate and the facilities plate.

6. The semiconductor substrate of claim 5 , wherein the first circuit board is attached to a lower surface of the baseplate and in a recess of the baseplate.

7. The semiconductor substrate of claim 6 , wherein the recesses of the baseplate and the facilities plate establish an RF shielded volume such that when RF is applied to the facilities plate RF current flows around the first and second circuit boards along outer surfaces of the facilities plate and the baseplate.

8. The semiconductor substrate support of claim 4 , wherein the second circuit board of the power switching device is attached to a first surface of the facilities plate and comprises the plurality of switches as transistors on at least one surface of the second circuit board, each transistor extending between the first surface of the facilities plate and a second surface of the facilities plate, and wherein at a point of termination on the second surface of the facilities plate, the transistors are sealed from RF with a sealing member.

9. The semiconductor substrate support of claim 4 , wherein each of the first and second circuit boards comprise plural signal wiring or traces and filtering elements connected between each trace and respective conductive common voltage planes.

10. The semiconductor substrate support of claim 1 , wherein the electrostatically-shielded volume between the baseplate and the facilities plate is a first electrostatically-shielded volume, the semiconductor substrate support further comprising:
a metal cage attached to the facilities plate such that a second electrostatically-shielded volume is formed between the metal cage and the facilities plate.

11. The semiconductor substrate support of claim 10 , wherein the second electrostatically-shielded volume is below the first electrostatically-shielded volume.

12. The semiconductor substrate support of claim 11 , wherein the conductive common plane is at a DC potential of the baseplate.

13. The semiconductor substrate support of claim 12 , wherein the power switching device is formed on a second circuit board, the second circuit board is DC isolated from ground and having a conductive common plane that is floated from ground and electrically connected to the facilities plate to maintain substantially the same DC potential of the facilities plate.

14. The semiconductor substrate support of claim 13 , wherein the second circuit board is attached to a lower surface of the facilities plate, such that the second circuit board is within the second electrostatically-shielded volume between the metal cage and the facilities plate.

15. The semiconductor substrate support of claim 1 , further comprising:
an electrically conductive gasket between outer peripheries of the baseplate and the facilities plate.

16. The semiconductor substrate support of claim 1 , comprising:
at least one RF filter configured to receive one of electrical power from a source and provide conditioned electrical power, respectively to the heater array via the power switching device and the power distribution circuit.

17. The semiconductor substrate support of claim 1 , wherein the power distribution circuit includes memory that stores at least one of configuration data, identification data, operating data of the power switching device.

18. The semiconductor substrate support of claim 1 , comprising:
a communication module that provides wireless communication between the power switching device and a processor external to the plasma processing chamber.

19. The semiconductor substrate support of claim 18 , wherein the power switching device is configured to encrypt and decrypt data signals communicated with the external processor.

Assignees

• Lam Res Corp

Inventors

• Gaff Keith William
• Anderson Tom
• Comendant Keith
• Lu Ralph Jan-Pin
• Robertson Paul
• Pape Eric A
• Benjamin Neil

Classifications

• H10P72/0602

  Temperature monitoring · CPC title

• H10P72/0434

  mainly by convection · CPC title

• H10P72/0432 Primary

  mainly by conduction · CPC title

• H10P72/72 Primary

  using electrostatic chucks · CPC title

• H10P74/207 Primary

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title