Package on package (PoP) device comprising thermal interface material (TIM) in cavity of an encapsulation layer

Patent metadata

Field	Value
Publication number	US-10002857-B2
Application number	US-201615225910-A
Country	US
Kind code	B2
Filing date	Aug 2, 2016
Priority date	Apr 12, 2016
Publication date	Jun 19, 2018
Grant date	Jun 19, 2018

Abstract

A package on package (PoP) device includes a first package, a thermal interface material, and a second package coupled to the first package. The first package includes a first integrated device and a first encapsulation layer that at least partially encapsulates the first integrated device, where the first encapsulation layer includes a first cavity located laterally with respect to the first integrated device. The thermal interface material (TIM) is coupled to the first integrated device such that the thermal interface material (TIM) is formed between the first integrated device and the second package. The thermal interface material (TIM) is formed in the first cavity of the first encapsulation layer.

First claim

What is claimed is:

1. A package on package (PoP) device comprising:
a first package comprising:
a first substrate comprising a dielectric layer;
a first integrated device coupled to the first substrate; and
a first encapsulation layer that at least partially encapsulates the first integrated device, the first encapsulation layer in direct contact with a side wall of the first integrated device, wherein the first encapsulation layer comprises a first cavity located laterally with respect to the first integrated device;

a second package coupled to the first package; and
a thermal interface material (TIM) coupled to the first integrated device such that the thermal interface material (TIM) is formed between the first integrated device and the second package, wherein the thermal interface material (TIM) is formed in the first cavity of the first encapsulation layer,
wherein the thermal interface material (TIM) as a whole, comprises a viscosity of about 23,000 millipascal seconds (mPa·s) or lower,
wherein the thermal interface material (TIM) comprises a thermal conductivity value of about 1 W/m·K or greater.

2. The package on package (PoP) device of claim 1 , wherein the first cavity is formed in the first encapsulation layer such that the first cavity is laterally formed around the first integrated device.

3. The package on package (PoP) device of claim 1 , wherein the first cavity is configured to capture the thermal interface material (TIM) that overflows over the integrated device during a curing process of the thermal interface material (TIM).

4. The package on package (PoP) device of claim 1 , wherein prior to the thermal interface material (TIM) being cured, the thermal interface material (TIM) comprises a viscosity of about 23,000 millipascal seconds (Pa·s) or lower, at 5 revolutions per minute (RPM).

5. The package on package (PoP) device of claim 1 , wherein the thermal interface material (TIM) comprises a thermal conductivity value of about 1.4 W/m·K or greater.

6. The package on package (PoP) device of claim 1 , wherein the first encapsulation layer comprises a photo-etchable encapsulation layer, wherein the photo-etchable encapsulation layer has a photo-etchable property.

7. The package on package (PoP) device of claim 1 , wherein the first substrate comprises a first redistribution portion.

8. A package on package (PoP) device comprising:
a first package comprising:
a first substrate comprising a dielectric layer;
a first integrated device coupled to the first substrate; and
a first encapsulation layer that at least partially encapsulates the first integrated device, the first encapsulation layer in direct contact with a side wall of the first integrated device, wherein the first encapsulation layer comprises a first cavity over the first integrated device;

a second package coupled to the first package; and
a thermal interface material (TIM) coupled to the first integrated device such that the thermal interface material (TIM) is formed between the first integrated device and the second package, wherein the thermal interface material (TIM) is formed in the first cavity of the first encapsulation layer,
wherein the thermal interface material (TIM) as a whole, comprises a viscosity of about 23,000 millipascal seconds (mPa·s) or lower,
wherein the thermal interface material (TIM) comprises a thermal conductivity value of about 1 W/m·K or greater.

9. The package on package (PoP) device of claim 8 , wherein the first encapsulation layer comprises a second cavity that is located laterally with respect to the first integrated device, and wherein the thermal interface material (TIM) is also formed in the second cavity of the first encapsulation layer.

10. The package on package (PoP) device of claim 9 , wherein the second cavity is formed in the first encapsulation layer such that the second cavity is laterally formed around the first integrated device.

11. The package on package (PoP) device of claim 9 , wherein the second cavity is configured to capture the thermal interface material (TIM) that overflows from the first cavity during a curing process of the thermal interface material (TIM).

12. The package on package (PoP) device of claim 8 , wherein the package on package (PoP) device is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of things (IoT) device, a laptop computer, a server, and a device in an automotive vehicle.

13. The package on package (PoP) device of claim 8 , wherein the first encapsulation layer comprises a photo-etchable encapsulation layer, wherein the photo-etchable encapsulation layer has a photo-etchable property.

14. The package on package (PoP) device of claim 8 , wherein the first substrate comprises a first redistribution portion.

15. An apparatus comprising:
a first package comprising:
a first redistribution portion comprising a dielectric layer;
a first integrated device coupled to the first redistribution portion; and
a first encapsulation layer that at least partially encapsulates the first integrated device, the first encapsulation layer in direct contact with a side wall of the first integrated device, wherein the first encapsulation layer comprises a first cavity located laterally with respect to the first integrated device;

a second package coupled to the first package; and
means for heat dissipation coupled to the first integrated device such that the means for heat dissipation is formed between the first integrated device and the second package, wherein the means for heat dissipation is formed in the first cavity of the first encapsulation layer,
wherein the means for heat dissipation as a whole, comprises a viscosity of about 23,000 millipascal seconds (Pa·s) or lower,
wherein the means for heat dissipation comprises a thermal conductivity value of about 1 W/m·K or greater.

16. The apparatus of claim 15 , wherein the first cavity is formed in the first encapsulation layer such that the first cavity is laterally formed around the first integrated device.

17. The apparatus of claim 15 , wherein the first cavity is configured to capture the means for heat dissipation that overflows over the integrated device during a curing process of the means for heat dissipation.

18. The apparatus of claim 15 , wherein prior to the means for heat dissipation being cured, the means for heat dissipation comprises a viscosity of about 23,000 millipascal seconds (Pa·s) or lower, at 5 revolutions per minute (RPM).

19. The apparatus of claim 15 , wherein the means for heat dissipation comprises a thermal conductivity value of about 1.4 W/m·K or greater.

20. An apparatus comprising:
a first package comprising:
a first redistribution portion comprising a dielectric layer;
a first integrated device coupled to the first redistribution portion; and
a first encapsulation layer that at least partially encapsulates the first integrated device, the first encapsulation layer in direct contact with a side wall of the first integrated device, wherein the first encapsulation layer comprises a first cavity over the first integrated device;

a second package coupled to the first package; and
means for heat dissipation coupled to the first integrated device such that the means for heat dissipation is

Assignees

• Qualcomm Inc

Inventors

• Solimando Michael James
• Stone William
• Holmes John
• Healy Christopher
• Pendse Rajendra
• Yun Sun

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W90/288

  characterised by arrangements for thermal management of the stacked chips · CPC title

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title