Memory system and method for simplifying scheduling on a flash interface module and reducing latencies in a multi-die environment
US-10025536-B2 · Jul 17, 2018 · US
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Tuers Daniel E patents
Tuers Daniel E is listed as an inventor on 25 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Tuers Daniel E |
| Total patents | 25 |
| First publication | Sep 17, 2015 |
| Latest publication | Jul 17, 2018 |
Notable patents
Publications ranked by popularity score, then publication date.
Preserving read look ahead data in auxiliary latches
US-10025532-B2 · Jul 17, 2018 · US
Memory system and method for reducing read disturb errors
US-10014060-B2 · Jul 3, 2018 · US
Memory system and method for delta writes
US-9904472-B2 · Feb 27, 2018 · US
Storage module and method for datapath bypass
US-9905314-B2 · Feb 27, 2018 · US
Storage module and method for processing an abort command
US-9792046-B2 · Oct 17, 2017 · US
Memory System and Method for Simplifying Scheduling on a Flash Interface Module and Reducing Latencies in a Multi-Die Environment
US-2017228167-A1 · Aug 10, 2017 · US
Storage module and method for on-chip copy gather
US-9678832-B2 · Jun 13, 2017 · US
Preserving read look ahead data in auxiliary latches
US-2017075629-A1 · Mar 16, 2017 · US
Storage module and method for determining ready/busy status of a plurality of memory dies
US-9507704-B2 · Nov 29, 2016 · US
Recent patents
Latest publications not already listed above.
Storage module and method for improving boot time during block binary searches
US-9459881-B2 · Oct 4, 2016 · US
Storage module and method for using healing effects of a quarantine process
US-9455038-B2 · Sep 27, 2016 · US
Storage module and method for improved error correction by detection of grown bad bit lines
US-9436549-B2 · Sep 6, 2016 · US
Memory die and method for efficient use of data latches in serving mixed traffic loads
US-9431120-B1 · Aug 30, 2016 · US
Memory System and Method for Delta Writes
US-2016224253-A1 · Aug 4, 2016 · US
Memory System and Method for Reducing Read Disturb Errors
US-2016225461-A1 · Aug 4, 2016 · US
Temperature accelerated stress time
US-9361030-B2 · Jun 7, 2016 · US
Storage Module and Method for Datapath Bypass
US-2016103732-A1 · Apr 14, 2016 · US
Storage Module and Method for On-Chip Copy Gather
US-2016085464-A1 · Mar 24, 2016 · US
Temperature accelerated stress time
US-2016054937-A1 · Feb 25, 2016 · US
Storage Module and Method for Using Healing Effects of a Quarantine Process
US-2016055910-A1 · Feb 25, 2016 · US
Storage Module and Method for Virtual Abort
US-2016034187-A1 · Feb 4, 2016 · US
Storage Module and Method for Improved Error Correction by Detection of Grown Bad Bit Lines
US-2016034353-A1 · Feb 4, 2016 · US
Storage Module and Method for Determining Ready/Busy Status of a Plurality of Memory Dies
US-2015363342-A1 · Dec 17, 2015 · US
Storage Module and Method for Improving Boot Time During Block Binary Searches
US-2015261613-A1 · Sep 17, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Sandisk Technologies Inc | 25 |
| Sandisk Technologies Llc | 12 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F3/0688 | 9 |
| G06F3/0679 | 8 |
| G11C2029/0411 | 7 |
| G06F3/0659 | 6 |
| G11C29/4401 | 4 |