Self-calibration in a memory device
US-12586656-B2 · Mar 24, 2026 · US
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Stave Eric J patents
Stave Eric J is listed as an inventor on 67 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Stave Eric J |
| Total patents | 67 |
| First publication | Mar 5, 2015 |
| Latest publication | Mar 24, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Self-training convergence detection
US-2026065152-A1 · Mar 5, 2026 · US
Voltage adjustment based on pending refresh operations
US-12542167-B2 · Feb 3, 2026 · US
Methods for tuning command/address bus timing and memory devices and memory systems using the same
US-12518811-B2 · Jan 6, 2026 · US
Interposers for memory device testing and characterization, including interposers for testing and characterizing decision feedback equalization circuitry of DDR5 memory devices
US-12512179-B2 · Dec 30, 2025 · US
Apparatuses and methods for dq terminal pseudo-random bit stream variation
US-2025266079-A1 · Aug 21, 2025 · US
Apparatus with data-rate-based voltage control mechanism and methods for operating the same
US-2025232798-A1 · Jul 17, 2025 · US
Self-adaptation of dram command/address interface
US-2025165340-A1 · May 22, 2025 · US
Apparatus with data-rate-based voltage control mechanism and methods for operating the same
US-12277963-B2 · Apr 15, 2025 · US
Power management for a memory device
US-12197264-B2 · Jan 14, 2025 · US
Recent patents
Latest publications not already listed above.
Self-calibration in a memory device
US-2024420789-A1 · Dec 19, 2024 · US
Self-calibration in a memory device
US-2024420790-A1 · Dec 19, 2024 · US
Methods for memory power management and memory devices and systems employing the same
US-12112830-B2 · Oct 8, 2024 · US
On die clock jitter injection for electromagnetic interference reduction
US-2024314990-A1 · Sep 19, 2024 · US
Systems and techniques for jitter reduction
US-12068751-B2 · Aug 20, 2024 · US
Optical signaling for stacked memory device architectures
US-2024268131-A1 · Aug 8, 2024 · US
Test devices having parallel impedances to reduce measurement input impedance and related apparatuses, systems, and methods
US-12051478-B2 · Jul 30, 2024 · US
Methods for tuning command/address bus timing and memory devices and memory systems using the same
US-2024249758-A1 · Jul 25, 2024 · US
Apparatus with data-rate-based voltage control mechanism and methods for operating the same
US-2024221813-A1 · Jul 4, 2024 · US
On-die termination configuration for a memory device
US-11977751-B2 · May 7, 2024 · US
Memory devices, modules and systems having memory devices with varying physical dimensions, memory formats, and operational capabilities
US-2024111707-A1 · Apr 4, 2024 · US
Methods for tuning command/address bus timing and memory devices and memory systems using the same
US-11948661-B2 · Apr 2, 2024 · US
Apparatus with data-rate-based voltage control mechanism and methods for operating the same
US-11881245-B2 · Jan 23, 2024 · US
Methods for triggering oscilloscopes and oscilloscopes employing the same
US-11867726-B2 · Jan 9, 2024 · US
Systems and techniques for jitter reduction
US-2024007092-A1 · Jan 4, 2024 · US
Interposers for memory device testing and characterization, including interposers for testing and characterizing decision feedback equalization circuitry of ddr5 memory devices
US-2023386596-A1 · Nov 30, 2023 · US
Memory devices, modules and systems having memory devices with varying physical dimensions, memory formats, and operational capabilities
US-11789890-B2 · Oct 17, 2023 · US
Apparatuses for characterizing system channels and associated methods and systems
US-11728001-B2 · Aug 15, 2023 · US
Voltage adjustment based on pending refresh operations
US-2023120654-A1 · Apr 20, 2023 · US
On-die termination configuration for a memory device
US-2023117882-A1 · Apr 20, 2023 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Micron Technology Inc | 59 |
| Lodestar Licensing Group Llc | 6 |
| Nanya Technology Corp | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C11/4074 | 23 |
| G11C11/4076 | 21 |
| G11C5/04 | 20 |
| Y02D10/00 | 19 |
| G11C2207/2254 | 17 |