Home power distribution with multiphase bridging
US-12232221-B2 · Feb 18, 2025 · US
This page is not indexed by search engines while we improve data quality.
Solka Michael B patents
Solka Michael B is listed as an inventor on 40 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Solka Michael B |
| Total patents | 40 |
| First publication | Jan 22, 2015 |
| Latest publication | Feb 18, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Modular Design Flow
US-2024427973-A1 · Dec 26, 2024 · US
Memory-network processor with programmable optimizations
US-11900124-B2 · Feb 13, 2024 · US
Home Power Distribution with Multiphase Bridging
US-2023276535-A1 · Aug 31, 2023 · US
Home power distribution with multiphase bridging
US-11683860-B2 · Jun 20, 2023 · US
Memory-network processor with programmable optimizations
US-2023153117-A1 · May 18, 2023 · US
Memory-network processor with programmable optimizations
US-11544072-B2 · Jan 3, 2023 · US
Distributed architecture for encoding and delivering video content
US-11483580-B2 · Oct 25, 2022 · US
Home Power Distribution with Multiphase Bridging
US-2022061127-A1 · Feb 24, 2022 · US
Home power distribution with multiphase bridging
US-11212876-B2 · Dec 28, 2021 · US
Recent patents
Latest publications not already listed above.
Memory-network processor with programmable optimizations
US-2021208895-A1 · Jul 8, 2021 · US
Memory-network processor with programmable optimizations
US-11016779-B2 · May 25, 2021 · US
Processing system with interspersed processors with multi-layer interconnect
US-10838787-B2 · Nov 17, 2020 · US
Selectively Disabling Configurable Communication Paths of a Multiprocessor Fabric
US-2020302090-A1 · Sep 24, 2020 · US
Secure boot sequence for selectively disabling configurable communication paths of a multiprocessor fabric
US-10685143-B2 · Jun 16, 2020 · US
Home Power Distribution with Multiphase Bridging
US-2020178355-A1 · Jun 4, 2020 · US
Processing system with interspersed processors with multi-layer interconnect
US-2020117521-A1 · Apr 16, 2020 · US
Processing system with interspersed processors with multi-layer interconnection
US-10521285-B2 · Dec 31, 2019 · US
Memory-Network Processor with Programmable Optimizations
US-2019369990-A1 · Dec 5, 2019 · US
Processing System With Interspersed Processors With Multi-Layer Interconnection
US-2019155666-A1 · May 23, 2019 · US
Processing system with interspersed processors with multi-layer interconnection
US-10185608-B2 · Jan 22, 2019 · US
Secure Boot Sequence for Selectively Disabling Configurable Communication Paths of a Multiprocessor Fabric
US-2018276416-A1 · Sep 27, 2018 · US
Processing System With Interspersed Processors With Multi-Layer Interconnection
US-2018267846-A1 · Sep 20, 2018 · US
Secure boot sequence for selectively disabling configurable communication paths of a multiprocessor fabric
US-10007806-B2 · Jun 26, 2018 · US
Processing system with interspersed processors with multi-layer interconnection
US-9990241-B2 · Jun 5, 2018 · US
Processing System With Interspersed Processors With Multi-Layer Interconnection
US-2017286196-A1 · Oct 5, 2017 · US
Processing system with interspersed processors with multi-layer interconnection
US-9720867-B2 · Aug 1, 2017 · US
Processing system with synchronization instruction
US-9558150-B2 · Jan 31, 2017 · US
Processing System With Interspersed Processors With Multi-Layer Interconnection
US-2016335218-A1 · Nov 17, 2016 · US
Memory-network processor with programmable optimizations
US-2016328231-A1 · Nov 10, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Coherent Logix Inc | 41 |
| Hyperx Logic Inc | 1 |
| Doerr Michael B | 1 |
| Garmany Jan D | 1 |
| Solka Michael B | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F15/76 | 21 |
| Y02D10/00 | 19 |
| G06F13/4027 | 11 |
| G06F13/4282 | 11 |
| G06F13/1673 | 11 |