Integrated circuit structures having airgaps for backside signal routing or power delivery
US-12588485-B2 · Mar 24, 2026 · US
Ranade Pushkar is listed as an inventor on 112 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Ranade Pushkar |
| Total patents | 112 |
| First publication | May 26, 2015 |
| Latest publication | Mar 24, 2026 |
Publications ranked by popularity score, then publication date.
US-12588485-B2 · Mar 24, 2026 · US
US-12572299-B2 · Mar 10, 2026 · US
US-12562215-B2 · Feb 24, 2026 · US
US-12550732-B2 · Feb 10, 2026 · US
US-2026026096-A1 · Jan 22, 2026 · US
US-2026005094-A1 · Jan 1, 2026 · US
US-2026006800-A1 · Jan 1, 2026 · US
US-2026006801-A1 · Jan 1, 2026 · US
US-2026005131-A1 · Jan 1, 2026 · US
US-12512365-B2 · Dec 30, 2025 · US
Latest publications not already listed above.
US-12498876-B2 · Dec 16, 2025 · US
US-12488832-B2 · Dec 2, 2025 · US
US-12471362-B2 · Nov 11, 2025 · US
US-12436711-B2 · Oct 7, 2025 · US
US-2024222276-A1 · Jul 4, 2024 · US
US-2024222435-A1 · Jul 4, 2024 · US
US-2024222469-A1 · Jul 4, 2024 · US
US-2024224504-A1 · Jul 4, 2024 · US
US-2024224508-A1 · Jul 4, 2024 · US
US-2024222520-A1 · Jul 4, 2024 · US
US-2024222271-A1 · Jul 4, 2024 · US
US-2024222228-A1 · Jul 4, 2024 · US
US-2024222347-A1 · Jul 4, 2024 · US
US-2024222438-A1 · Jul 4, 2024 · US
US-2024215256-A1 · Jun 27, 2024 · US
US-2024215222-A1 · Jun 27, 2024 · US
US-2024113025-A1 · Apr 4, 2024 · US
US-2024105700-A1 · Mar 28, 2024 · US
US-2024105582-A1 · Mar 28, 2024 · US
US-2024105635-A1 · Mar 28, 2024 · US
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 66 |
| Mie Fujitsu Semiconductor Ltd | 46 |
| Ranade Pushkar | 5 |
| Shifren Lucian | 1 |
| Hoffmann Thomas | 1 |
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D84/038 | 45 |
| H10D30/601 | 39 |
| H10D62/371 | 31 |
| H10D62/314 | 25 |
| H01L29/1083 | 22 |