Power savings method in a clock mesh-based design through a smart decloning technique
US-10248750-B2 · Apr 2, 2019 · US
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Millar Brian patents
Millar Brian is listed as an inventor on 6 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Millar Brian |
| Total patents | 6 |
| First publication | Nov 10, 2016 |
| Latest publication | Apr 2, 2019 |
Notable patents
Publications ranked by popularity score, then publication date.
Intelligent cell swapping based on ceiling determination, floor determination, and cell attribute weighting criteria
US-10089428-B2 · Oct 2, 2018 · US
Low power minimal disruptive method to implement large quantity push and pull useful-skew schedules with enabling circuits in a clock-mesh based design
US-9779201-B2 · Oct 3, 2017 · US
Dual supply memory
US-9647453-B2 · May 9, 2017 · US
Efficient skew scheduling methodology for performance and low power of a clock-mesh implementation
US-9571074-B2 · Feb 14, 2017 · US
Power savings method in a clock mesh-based design through a smart decloning technique
US-2016328507-A1 · Nov 10, 2016 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Samsung Electronics Co Ltd | 6 |
| Millar Brian | 4 |
| Chowdhury Ahsan H | 2 |
| Fedor John M | 2 |
| Colyer Robert A | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F1/10 | 3 |
| G06F30/398 | 3 |
| G06F30/396 | 3 |
| G06F2117/04 | 3 |
| G06F30/30 | 2 |