Semiconductor device and method for producing same
US-2021320204-A1 · Oct 14, 2021 · US
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Levin Sharon patents
Levin Sharon is listed as an inventor on 19 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Levin Sharon |
| Total patents | 19 |
| First publication | May 7, 2015 |
| Latest publication | Oct 14, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Method of forming high-voltage silicon-on-insulator device with diode connection to handle layer
US-10522388-B1 · Dec 31, 2019 · US
Apparatus of a metal-oxide-semiconductor (MOS) transistor including a multi-split gate
US-10217826-B2 · Feb 26, 2019 · US
Apparatus of a metal-oxide-semiconductor (mos) transistor including a multi-split gate
US-2018145139-A1 · May 24, 2018 · US
Semiconductor die with a metal via
US-9837411-B2 · Dec 5, 2017 · US
LDMOS device having a low angle sloped oxide
US-9812566-B1 · Nov 7, 2017 · US
Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structure
US-9806174-B2 · Oct 31, 2017 · US
Deep silicon via as a drain sinker in integrated vertical DMOS transistor
US-9728632-B2 · Aug 8, 2017 · US
Die including a high voltage capacitor
US-9640607-B2 · May 2, 2017 · US
Semiconductor die with a metal via
US-2017018503-A1 · Jan 19, 2017 · US
Recent patents
Latest publications not already listed above.
Double-resurf ldmos with drift and psurf implants self-aligned to a stacked gate "bump" structure
US-2016372578-A1 · Dec 22, 2016 · US
Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structure
US-9484454-B2 · Nov 1, 2016 · US
Die including a Schottky diode
US-9461039-B2 · Oct 4, 2016 · US
Die including a high voltage capacitor
US-2016260796-A1 · Sep 8, 2016 · US
Die including a schottky diode
US-2016240529-A1 · Aug 18, 2016 · US
LDMOS transistor having elevated field oxide bumps and method of making same
US-9330979-B2 · May 3, 2016 · US
Double-Resurf LDMOS With Drift And PSURF Implants Self-Aligned To A Stacked Gate "BUMP" Structure
US-2015279969-A1 · Oct 1, 2015 · US
Double RESURF LDMOS with separately patterned P+ and N+ buried layers formed by shared mask
US-9105712-B1 · Aug 11, 2015 · US
Deep Silicon Via As A Drain Sinker In Integrated Vertical DMOS Transistor
US-2015123194-A1 · May 7, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Tower Semiconductor Ltd | 18 |
| Tower Semiconductors Ltd | 3 |
| Levin Sharon | 1 |
| Heiman Alexey | 1 |
| Shaked Zohar | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D30/65 | 12 |
| H10D84/038 | 9 |
| H01L29/7816 | 9 |
| H10D84/856 | 8 |
| H10D64/111 | 8 |