Double RESURF LDMOS with separately patterned P+ and N+ buried layers formed by shared mask

Patent metadata

Field	Value
Publication number	US-9105712-B1
Application number	US-201414475486-A
Country	US
Kind code	B1
Filing date	Sep 2, 2014
Priority date	Sep 2, 2014
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

A double-RESURF LDMOS fabrication method utilizes a shared mask to form separately patterned N+ buried layer (NBL) and P+ buried layer (PBL) regions. The mask includes two opening types (e.g., large and small), and the P-type and N-type implant materials are separately directed onto the mask at different implant angles, such that the N-type implant passes through both opening types to form a first pattered implant region in both a first region and a surrounding second region, and such that the P-type implant material passes only through the larger openings and forms a second pattered implant region only in the first substrate portion. An optional epitaxial layer is deposited over the substrate and annealed to form the separately patterned PBL and NBL in the epitaxial layer, where a portion of the PBL diffuses above the NBL and forms a P-surf region below the LDMOS's N-drift region.

First claim

We claim:

1. A method for fabricating a double-RESURF LDMOS transistor including an N+ buried layer and a P-surf region disposed over the N+ buried layer, the method comprising:
forming a mask on a surface of a substrate, the mask consisting of a mask material layer defining both at least one first opening disposed over a first region of the substrate, and a plurality of second openings disposed over a second region of the substrate, wherein the first opening is larger than each of the second openings in at least one direction;
directing a P-type implant material and an N-type implant material onto the mask, a first implant material of said P-type and N-type implant materials being directed at a first angle onto the mask such that the first implant material only passes through the at least one first opening and forms a first implant region only in the first region of the substrate, and a second implant material of said P-type and N-type implant materials being directed at a second angle such that the second implant material passes through both said at least one first opening and said plurality of second openings such that subsequent annealing causes the second implant material to form a second implant region disposed in both the first region and the second region of the substrate;
forming an epitaxial layer on the substrate over the first and second implant regions; and
annealing the substrate such that the first implant material forming the first implant region diffuses from the first region into the epitaxial layer to form a first buried layer of a P+ buried layer and said N+ buried layer, and such that the second implant material forming the second implant region diffuses from the first and second regions into the epitaxial layer to form a second buried layer of said P+ buried layer and said N+ buried layer, wherein the P-type implant material forming the P+ buried layer form a P+ buried layer including a P-surf region disposed between the N+ buried layer and an upper surface of the epitaxial layer.

2. The method of claim 1 , wherein forming the mask comprises depositing a resist material layer on the surface of the substrate, and patterning the resist material layer such that the plurality of second openings comprise a plurality of substantially square openings disposed in an array pattern.

3. The method of claim 2 ,
wherein directing the first implant material comprises directing the first implant material at an angle in the range of 22 to 65 degrees relative to a plane defined by an upper surface of the mask; and
wherein directing the second implant material comprises directing the second implant material at an angle in the range of 0 to 7 degrees relative to a perpendicular to the plane defined by the upper surface of the mask.

4. The method of claim 3 ,
wherein directing the first implant material comprises directing a P-type implant material at the first angle onto the mask, and
wherein directing the second implant material comprises directing an N-type implant material at the second angle onto the mask.

5. The method of claim 3 ,
wherein directing the first implant material comprises directing Boron at the first angle onto the mask, and
wherein directing the second implant material comprises directing Antimony at the second angle onto the mask.

6. The method of claim 5 ,
wherein directing the Boron at the first angle onto the mask comprises directing the Boron in a first ion beam having an energy in the range of 20 and 100 KeV, and maintained such that the first implant region has a dosage in the range of 1×10 13 cm −3 and 5×10 14 cm −3 , and
wherein directing the Antimony at the second angle onto the mask comprises directing the Antimony in a second ion beam having an energy in the range of 50 and 90 KeV such that the second implant regions have a dosage in the range of 5×10 15 and 8×10 15 cm −3 .

7. The method of claim 6 , wherein forming the epitaxial layer comprises forming a layer of epitaxial silicon having a P-type conductivity and a thickness in the range of 4 to 15 microns and a resistivity in the range of 1 and 100 Ohm-cm.

8. The method of claim 7 , wherein annealing the substrate comprises heating the substrate and epitaxial silicon layer to a temperature of 1100 and 1250° C. for a period in the range of 60 and 500 minutes.

9. The method of claim 7 , further comprising forming an N-type sinker extending through the epitaxial silicon layer to said N+ buried layer.

10. The method of claim 9 , further comprising forming an N-well implant extending through the epitaxial silicon layer to said N+ buried layer, wherein said N-well implant extends from said sinker region over the buried layer and the P+ buried layer.

11. The method of claim 10 , further comprising forming an N-drift implant region in said N-well implant above the P-surf region, and then forming a gate oxide structure on a portion of the epitaxial silicon layer disposed over the N-drift implant region.

12. The method of claim 11 , further comprising forming a polycrystalline silicon gate structure on a portion of the epitaxial silicon layer and on a portion of the gate oxide structure, and forming source and drain implants in the epitaxial layer on opposing sides of the polycrystalline silicon gate structure.

13. A method for fabricating a double-RESURF N-type laterally diffused metal oxide semiconductor (NLDMOS) transistor, the method comprising:
forming a mask on a surface of a substrate, the mask consisting of a mask material layer defining both a first opening disposed over a first region of the substrate, and a plurality of second openings disposed over a second region of the substrate, wherein the first opening is larger than each of the second openings in at least one direction;
directing a P-type implant material and an N-type implant material onto the mask, the P-type implant material being directed at a first angle onto the mask such that the P-type implant material only passes through the first opening and forms a first implant region only in the first region of the substrate, and the N-type implant material being directed at a second angle such that the N-type implant material passes through both said first opening and said plurality of second openings, and such that subsequent annealing causes the N-type implant material to form a second implant region disposed in both the first region and the second region of the substrate;
forming an epitaxial layer on the substrate over the first and second implant regions; and
annealing the substrate such that the N-type implant material forming the second implant region diffuses from the first and second regions into the epitaxial layer to form an N+ buried layer, and such that the P-type implant material forming the first implant region diffuses from the first region into the epitaxial layer to form a P+ buried layer that intersects a portion of the N+ buried layer and includes a P-surf region disposed between said N+ buried layer portion and an upper surface of the epitaxial layer.

14. The method of claim 13 ,
wherein directing the first implant material comprises directing Boron at the first angle onto the mask, and
wherein directing the second implant material comprises directing Antimony at the second angle onto the mask,
whereby said annealing causes said Boron to up-diffuse at a faster rate than said Antimony such that said P-surf implant region is formed above said N+ buried layer.

15. The method of claim 13 ,
wherein directing the P-type implant material comprises directing an ion beam including the P-type implant material at an angle in the range of 22 to 65

Assignees

• Tower Semiconductor Ltd
• Tower Semiconductors Ltd

Inventors

• Levy Sagy
• Gurvinder Jolly
• Levin Sharon

Classifications

• H10P30/222 Primary

  characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

• H10P30/22

  using masks · CPC title

• H10D64/516

  the thicknesses being non-uniform · CPC title

• H10D62/371

  Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current · CPC title

• H10D62/157

  Impurity concentrations or distributions · CPC title