Cache transfer time mitigation
US-11243887-B2 · Feb 8, 2022 · US
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Gaertner Mark patents
Gaertner Mark is listed as an inventor on 14 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Gaertner Mark |
| Total patents | 14 |
| First publication | Mar 31, 2015 |
| Latest publication | Feb 8, 2022 |
Notable patents
Publications ranked by popularity score, then publication date.
Cache transfer time mitigation
US-2020192806-A1 · Jun 18, 2020 · US
Cache access time mitigation
US-10580468-B2 · Mar 3, 2020 · US
Cache transfer time mitigation
US-10579533-B2 · Mar 3, 2020 · US
Probabilistic aging command sorting
US-10310923-B1 · Jun 4, 2019 · US
Cache access time mitigation
US-2019103146-A1 · Apr 4, 2019 · US
Cache transfer time mitigation
US-2019102307-A1 · Apr 4, 2019 · US
Cache management in data storage systems
US-10180792-B1 · Jan 15, 2019 · US
Methods and apparatuses utilizing check bit data generation
US-9552252-B2 · Jan 24, 2017 · US
Group based codes for multi-dimensional recording (MDR)
US-9396062-B1 · Jul 19, 2016 · US
Recent patents
Latest publications not already listed above.
Methods and apparatuses utilizing check bit data generation
US-2016055053-A1 · Feb 25, 2016 · US
Memory stacks management
US-9244860-B2 · Jan 26, 2016 · US
Memory stacks management
US-2015169466-A1 · Jun 18, 2015 · US
Memory stacks management
US-8996842-B2 · Mar 31, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Seagate Technology Llc | 14 |
| Gaertner Mark | 2 |
| Sridhara Deepak | 1 |
| Radich William | 1 |
| Patapoutian Ara | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F12/0866 | 6 |
| G06F12/0871 | 6 |
| G06F3/061 | 6 |
| G06F3/065 | 4 |
| G06F12/0811 | 4 |