Cache transfer time mitigation

Patent metadata

Field	Value
Publication number	US-10579533-B2
Application number	US-201715719957-A
Country	US
Kind code	B2
Filing date	Sep 29, 2017
Priority date	Sep 29, 2017
Publication date	Mar 3, 2020
Grant date	Mar 3, 2020

Abstract

In accordance with one implementation, a method for mitigating cache transfer time entails reading data into memory from at least two consecutive elliptical data tracks in a main store region of data storage and writing the data read from the at least two consecutive elliptical data tracks to a spiral data track within a cache storage region.

First claim

What is claimed is:

1. A method comprising:
reading data from at least two consecutive elliptical data tracks in a main store region of a individual storage device into volatile memory of the individual storage device; and
writing the data from the at least two consecutive elliptical data tracks to a spiral data track within a cache storage region of a magnetic disk of the individual storage device.

2. The method of claim 1 , wherein reading of the data from the at least two consecutive elliptical tracks includes reading a greater number of total data bits from the main store region than a number of data bits written to the cache storage region during the writing of the read data.

3. The method of claim 1 , wherein the at least two elliptical data tracks store data arranged in sectors of a first size and the spiral data track stores data arranged in sectors of a second size larger than the first size.

4. The method of claim 1 , further comprising:
reducing a total number of error correction data bits included in the data prior to writing the data to the spiral data track.

5. The method of claim 1 , further comprising:
reducing a total number of sector header bits included in the data prior to writing the data to the spiral data track.

6. The method of claim 1 , wherein the spiral data track within the cache storage region is of a wider track width than data tracks in a main store region of the magnetic disk.

7. The method of claim 1 , wherein the spiral data track within the cache storage region stores data at a higher linear storage density than data tracks of a main store region of the magnetic disk.

8. The method of claim 1 , wherein the cache storage region is included in a storage device with multiple read/write heads and the method further comprises:
selecting a write head to write the read data to the cache storage region, the selected write head capable of writing at a higher linear density that at least one other write head in the storage device.

9. A storage device comprising:
a storage media including a cache storage region and a main store region; and
a controller configured to control a transducer head to consecutive data tracks in the main store region and write the data read from the at least two.

10. The storage device of claim 9 , wherein the cache region stores data in sectors of a first size and the main store region stores user data in sectors of a second size smaller than the first size.

11. The storage device of claim 9 , wherein the controller is configured to reformat the data read from the at least two consecutive data tracks and write the reformatted data to the spiral data track, the reformatted data including fewer total data bits than the read data.

12. The storage device of claim 9 , wherein the controller is configured to reduce at least one of sector header data bits or error correction data bits included in the data prior to writing the data to the spiral data track.

13. The storage device of claim 9 , wherein the controller is further configured to select a transducer head for writing the data to the spiral data track, the selected transducer head capable of writing at a higher linear density that at least one other transducer head in the storage device.

14. The storage device of claim 9 , wherein the spiral data track within the cache storage region is of a wider track width than each of the at least two consecutive data tracks.

15. The storage device of claim 9 , wherein the controller is further configured to increase a linear storage density of the data when writing to the cache storage region as compared to a linear storage density of the data stored within the at least two data tracks of the main store region.

16. The storage device of claim 9 , wherein the controller is configured to select a write element for writing the data to the cache storage region, the selected write element configured to write data at a higher linear storage density in the cache storage region than in the at least two consecutive data tracks.

Assignees

• Seagate Technology Llc

Inventors

• Kowles Andrew Michael
• Liu Xiong
• Gaertner Mark
• Yang Kai
• Xie Wenxiang
• Lin jiangnan

Classifications

• G06F3/065

  Replication mechanisms · CPC title

• G06F12/0811

  with multilevel cache hierarchies · CPC title

• G06F12/0871 Primary

  Allocation or management of cache space · CPC title

• G06F2212/1024

  Latency reduction · CPC title

• G06F2212/452

  Instruction code · CPC title