Methods for Manufacturing Semiconductor Packages
US-2025266311-A1 · Aug 21, 2025 · US
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Chiang Chau Fatt patents
Chiang Chau Fatt is listed as an inventor on 62 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chiang Chau Fatt |
| Total patents | 62 |
| First publication | Oct 25, 2016 |
| Latest publication | Aug 21, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Semiconductor packages and methods for manufacturing thereof
US-12300559-B2 · May 13, 2025 · US
Leadframe, semiconductor package and method
US-12218038-B2 · Feb 4, 2025 · US
Semiconductor package with metal posts from structured leadframe
US-12176222-B2 · Dec 24, 2024 · US
Semiconductor package with floating metal portion and method for manufacturing
US-2024343553-A1 · Oct 17, 2024 · US
Semiconductor package and method for fabricating a semiconductor package
US-12021000-B2 · Jun 25, 2024 · US
Dual step laser processing of an encapsulant of a semiconductor chip package
US-11791169-B2 · Oct 17, 2023 · US
Leaded semiconductor package formation using lead frame with structured central pad
US-2023178428-A1 · Jun 8, 2023 · US
Semiconductor package with metal posts from structured leadframe
US-2023170226-A1 · Jun 1, 2023 · US
Semiconductor package with metal posts from structured leadframe
US-2023170329-A1 · Jun 1, 2023 · US
Recent patents
Latest publications not already listed above.
Semiconductor package with lead tip inspection feature
US-11587800-B2 · Feb 21, 2023 · US
Semiconductor Package with Lead Tip Inspection Feature
US-2023049564-A1 · Feb 16, 2023 · US
Chip to chip interconnect in encapsulant of molded semiconductor package
US-11569196-B2 · Jan 31, 2023 · US
Method for connecting an electrical device to a bottom unit by using a solderless joint
US-2022278085-A1 · Sep 1, 2022 · US
Semiconductor Packages and Methods for Manufacturing Thereof
US-2022199478-A1 · Jun 23, 2022 · US
Double-sided cooled molded semiconductor package
US-11302613-B2 · Apr 12, 2022 · US
Pressure sensor having a lidless/laminate structure
US-11274984-B2 · Mar 15, 2022 · US
Semiconductor Package and Method for Fabricating a Semiconductor Package
US-2022037222-A1 · Feb 3, 2022 · US
Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Package
US-2021391298-A1 · Dec 16, 2021 · US
Semiconductor Package with Lead Tip Inspection Feature
US-2021366732-A1 · Nov 25, 2021 · US
Over-under sensor packaging with sensor spaced apart from control chip
US-11174152-B2 · Nov 16, 2021 · US
Semiconductor package and method for fabricating the same
US-2021313294-A1 · Oct 7, 2021 · US
Chip to chip interconnect in encapsulant of molded semiconductor package
US-11133281-B2 · Sep 28, 2021 · US
Manufacturing a package using plateable encapsulant
US-11081417-B2 · Aug 3, 2021 · US
Dual Step Laser Processing of an Encapsulant of a Semiconductor Chip Package
US-2021050227-A1 · Feb 18, 2021 · US
Pressure Sensor
US-2021025774-A1 · Jan 28, 2021 · US
Double-Sided Cooled Molded Semiconductor Package
US-2021020550-A1 · Jan 21, 2021 · US
Molded Semiconductor Package with Double-Sided Cooling
US-2021020547-A1 · Jan 21, 2021 · US
Molded semiconductor package with double-sided cooling
US-10886199-B1 · Jan 5, 2021 · US
Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Package
US-2020321276-A1 · Oct 8, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Infineon Technologies Ag | 60 |
| Infineon Technologies Austria Ag | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W74/111 | 37 |
| H10W74/016 | 25 |
| H01L21/565 | 21 |
| H10W72/0198 | 21 |
| H10W74/01 | 20 |