Gpu asynchronous matrix multiply accumulate applications
US-2025291590-A1 · Sep 18, 2025 · US
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Chen Kaiyu patents
Chen Kaiyu is listed as an inventor on 19 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chen Kaiyu |
| Total patents | 19 |
| First publication | May 19, 2016 |
| Latest publication | Sep 18, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Systolic array matrix accelerator for graphics processing unit applications
US-2025292354-A1 · Sep 18, 2025 · US
Systolic array of arbitrary physical and logical depth
US-2025117360-A1 · Apr 10, 2025 · US
32-bit channel-aligned integer multiplication via multiple multipliers per-channel
US-2025037347-A1 · Jan 30, 2025 · US
Systolic array of arbitrary physical and logical depth
US-12174783-B2 · Dec 24, 2024 · US
Cross-thread register sharing for matrix multiplication compute
US-2024168807-A1 · May 23, 2024 · US
Systolic array of arbitrary physical and logical depth
US-2022414053-A1 · Dec 29, 2022 · US
Divergent control flow for fused EUs
US-10699362-B2 · Jun 30, 2020 · US
Software scoreboard information and synchronization
US-10692170-B2 · Jun 23, 2020 · US
Graphics processor register data re-use mechanism
US-10636112-B2 · Apr 28, 2020 · US
Recent patents
Latest publications not already listed above.
Graphics processor register renaming mechanism
US-10565670-B2 · Feb 18, 2020 · US
Global optimal path determination utilizing parallel processing
US-10515431-B2 · Dec 24, 2019 · US
Software scoreboard information and synchronization
US-2019362460-A1 · Nov 28, 2019 · US
Graphics processor register data re-use mechanism
US-2019304056-A1 · Oct 3, 2019 · US
Software scoreboard information and synchronization
US-10360654-B1 · Jul 23, 2019 · US
Global optimal path determination utilizing parallel processing
US-2019180406-A1 · Jun 13, 2019 · US
Efficient preemption for graphics processors
US-10282227-B2 · May 7, 2019 · US
Divergent Control Flow for Fused EUs
US-2017372446-A1 · Dec 28, 2017 · US
Efficient preemption for graphics processors
US-2016140686-A1 · May 19, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 19 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06T1/20 | 16 |
| G06T15/005 | 9 |
| G06T1/60 | 9 |
| G06F9/3851 | 7 |
| G06F15/8046 | 6 |