Method and an apparatus for treating a surface of a TCO material, in a semiconductor device
US-11769851-B2 · Sep 26, 2023 · US
for the formation of PN junctions without addition of impurities
for the formation of PN junctions without addition of impurities · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10P95/902 |
| Official title | {for the formation of PN junctions without addition of impurities} |
| Display label | for the formation of PN junctions without addition of impurities |
| Total patents | 51 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly declining.
| Year | Patents |
|---|---|
| 2015 | 8 |
| 2016 | 12 |
| 2017 | 10 |
| 2018 | 7 |
| 2019 | 7 |
| 2020 | 4 |
| 2021 | 1 |
| 2023 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Method for manufacturing a semiconductor-on-insulator structure for radiofrequency applications
US-2023025429-A1 · Jan 26, 2023 · US
Method of manufacturing a semiconductor device comprising first and second field stop zone portions
US-11081544-B2 · Aug 3, 2021 · US
Laser anneal process
US-10867809-B2 · Dec 15, 2020 · US
Direct current lamp driver for substrate processing
US-10734257-B2 · Aug 4, 2020 · US
Vertical fin type bipolar junction transistor (BJT) device with a self-aligned base contact
US-10658495-B2 · May 19, 2020 · US
Vertical fin type bipolar junction transistor (bjt) device with a self-aligned base contact
US-2020119170-A1 · Apr 16, 2020 · US
Heat treatment susceptor and heat treatment apparatus
US-2019393055-A1 · Dec 26, 2019 · US
Method of Manufacturing a Semiconductor Device Comprising First and Second Field Stop Zone Portions
US-2019165090-A1 · May 30, 2019 · US
Method of forming semiconductor device and semiconductor apparatus
US-2019157104-A1 · May 23, 2019 · US
Method for manufacturing thin film transistor
US-10297678-B2 · May 21, 2019 · US
A method and an apparatus for treating a surface of a tco material in a semiconductor device
US-2019067509-A1 · Feb 28, 2019 · US
Substrate processing system with lamphead having temperature management
US-10202707-B2 · Feb 12, 2019 · US
Method for Manufacturing Thin Film Transistor
US-2019027587-A1 · Jan 24, 2019 · US
Method of manufacturing semiconductor devices and semiconductor device containing hydrogen-related donors
US-10128328-B2 · Nov 13, 2018 · US
Methods for forming a semiconductor device and a semiconductor device
US-10096677-B2 · Oct 9, 2018 · US
Semiconductor device having a defined oxygen concentration
US-10014400-B2 · Jul 3, 2018 · US
Optics for controlling light transmitted through a conical quartz dome
US-2018130653-A1 · May 10, 2018 · US
Method of Manufacturing Semiconductor Devices and Semiconductor Device Containing Hydrogen-Related Donors
US-2018122895-A1 · May 3, 2018 · US
Optics for controlling light transmitted through a conical quartz dome
US-9905444-B2 · Feb 27, 2018 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10P95/902?
- CPC H10P95/902 is the Cooperative Patent Classification code for “for the formation of PN junctions without addition of impurities.”
- How many patents are filed under CPC H10P95/902 (for the formation of PN junctions without addition of impurities)?
- Our database includes 51 publications tagged with this CPC code.
- Is patent activity under CPC H10P95/902 growing?
- Publication counts under this code: 1 in 2021 vs 2 in 2023 (latest complete years).