Semiconductor device
US-2024363707-A1 · Oct 31, 2024 · US
Diffusion for doping of insulating layers
Diffusion for doping of insulating layers · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10P32/20 |
| Official title | Diffusion for doping of insulating layers |
| Display label | Diffusion for doping of insulating layers |
| Total patents | 783 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 30 |
| 2016 | 52 |
| 2017 | 70 |
| 2018 | 72 |
| 2019 | 66 |
| 2020 | 95 |
| 2021 | 73 |
| 2022 | 84 |
| 2023 | 70 |
| 2024 | 86 |
| 2025 | 75 |
| 2026 | 10 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Method of forming a gate structure
US-2024332089-A1 · Oct 3, 2024 · US
Integrated dipole region for transistor
US-2024063064-A1 · Feb 22, 2024 · US
Semiconductor device
US-2024014294-A1 · Jan 11, 2024 · US
Differential etch of metal oxide blocking dielectric layer for three-dimensional memory devices
US-2016379989-A1 · Dec 29, 2016 · US
SiARC REMOVAL WITH PLASMA ETCH AND FLUORINATED WET CHEMICAL SOLUTION COMBINATION
US-2016372334-A1 · Dec 22, 2016 · US
Methods for introducing carbon to a semiconductor structure and structures formed thereby
US-9525024-B2 · Dec 20, 2016 · US
Systems and methods for forming ultra-shallow junctions
US-2016365251-A1 · Dec 15, 2016 · US
Semiconductor structure and method of forming the same
US-9515021-B1 · Dec 6, 2016 · US
Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme
US-2016351452-A1 · Dec 1, 2016 · US
Mechanism for forming metal gate structure
US-9496367-B2 · Nov 15, 2016 · US
Mechanism for FinFET Well Doping
US-2016329331-A1 · Nov 10, 2016 · US
Method of patterning dopant films in high-K dielectrics in a soft mask integration scheme
US-9472419-B2 · Oct 18, 2016 · US
Method of Manufacturing a Semiconductor Device with a Polysilicon-Filled Trench
US-2016300920-A1 · Oct 13, 2016 · US
Metal-semiconductor contact structure with doped interlayer
US-9466488-B2 · Oct 11, 2016 · US
Method of manufacturing silicon carbide semiconductor device
US-9466675-B2 · Oct 11, 2016 · US
Semiconductor device and method for manufacturing the same
US-2016284859-A1 · Sep 29, 2016 · US
Atomic layer process chamber for 3d conformal processing
US-2016276162-A1 · Sep 22, 2016 · US
Mechanism for FinFET well doping
US-9406546-B2 · Aug 2, 2016 · US
Method of manufacturing a semiconductor device with a continuous silicate glass structure
US-9384960-B2 · Jul 5, 2016 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10P32/20?
- CPC H10P32/20 is the Cooperative Patent Classification code for “Diffusion for doping of insulating layers.”
- How many patents are filed under CPC H10P32/20 (Diffusion for doping of insulating layers)?
- Our database includes 783 publications tagged with this CPC code.
- Is patent activity under CPC H10P32/20 growing?
- Publication counts under this code: 86 in 2024 vs 75 in 2025 (latest complete years).