Method of manufacturing silicon carbide semiconductor device

Patent metadata

Field	Value
Publication number	US-9466675-B2
Application number	US-201414779924-A
Country	US
Kind code	B2
Filing date	Mar 4, 2014
Priority date	Apr 25, 2013
Publication date	Oct 11, 2016
Grant date	Oct 11, 2016

Abstract

A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.

First claim

The invention claimed is:

1. A method of manufacturing a silicon carbide semiconductor device, comprising the steps of:
forming a recess in a silicon carbide substrate by partially etching said silicon carbide substrate;
forming a mask layer having a pattern on said silicon carbide substrate by means of photolithography using said recess in said silicon carbide substrate as an alignment mark;
implanting an impurity into said silicon carbide substrate using said mask layer;
annealing said silicon carbide substrate in order to activate said impurity;
after said step of annealing said silicon carbide substrate, depositing a first electrode layer on said silicon carbide substrate; and
patterning said first electrode layer by means of photolithography using said recess in said silicon carbide substrate as an alignment mark.

2. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
said step of annealing said silicon carbide substrate is performed at 1500° C. or more and 2000° C. or less.

3. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the step of, before said step of forming a mask layer, forming a protecting film made of a material different from each of a material for said mask layer and silicon carbide on said recess.

4. The method of manufacturing a silicon carbide semiconductor device according to claim 3 , further comprising the step of, after said step of implanting an impurity, removing said protecting film.

5. The method of manufacturing a silicon carbide semiconductor device according to claim 4 , wherein
said step of removing said protecting film is performed before said step of annealing said silicon carbide substrate.

6. The method of manufacturing a silicon carbide semiconductor device according to claim 5 , wherein
said material for said protecting film has a melting point of 1500° C. or less.

7. The method of manufacturing a silicon carbide semiconductor device according to claim 5 , wherein
said material for said protecting film contains at least one of silicon oxide, silicon nitride and silicon oxynitride.

8. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the step of, after said step of patterning said first electrode layer, forming a second electrode layer on said silicon carbide substrate by means of photolithography using said recess in said silicon carbide substrate as an alignment mark.

9. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
said step of patterning said first electrode layer includes the step of forming a mark portion by partially removing said first electrode layer, and
said method further comprises the step of forming a second electrode layer on said silicon carbide substrate by means of photolithography using said mark portion of said first electrode layer as an alignment mark.

Assignees

• Sumitomo Electric Industries

Inventors

• Miyazaki Tomihito
• Okamoto Chikayuki

Classifications

• H10D12/032

  of vertical IGBTs · CPC title

• H10P50/28

  of insulating materials · CPC title

• H10P32/20

  Diffusion for doping of insulating layers · CPC title

• H10P30/22

  using masks · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title