Differential etch of metal oxide blocking dielectric layer for three-dimensional memory devices

Patent metadata

Field	Value
Publication number	US-2016379989-A1
Application number	US-201514748871-A
Country	US
Kind code	A1
Filing date	Jun 24, 2015
Priority date	Jun 24, 2015
Publication date	Dec 29, 2016
Grant date	—

Abstract

A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.

First claim

What is claimed is:

1 . A method of manufacturing a semiconductor structure, comprising:
forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate; forming a memory opening through the stack; forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, wherein the horizontal portion differs from the vertical portion by at least one of structure or composition; and selectively etching the horizontal portion selective to the vertical portion.

2 . The method of claim 1 , wherein the structure of the horizontal portion differs from the structure of the vertical portion.

3 . The method of claim 2 , further comprising annealing the aluminum oxide layer such that the vertical portion comprises polycrystalline aluminum oxide and the horizontal portion comprises amorphous aluminum oxide after the anneal.

4 . The method of claim 1 , wherein the composition of the horizontal portion differs from the structure of the vertical portion.

5 . The method of claim 4 , wherein an aluminum to oxygen atomic ratio of the horizontal portion differs from the aluminum to oxygen atomic ratio of the vertical portion.

6 . The method of claim 4 , wherein:
the horizontal portion comprises a doped aluminum oxygen compound portion on a semiconductor surface at the bottom of the memory opening; the vertical portion consists essentially of aluminum oxide; and a dopant in the doped aluminum oxygen compound portion enhances an etch rate of the horizontal portion relative to the vertical portion.

7 . The method of claim 6 , wherein the doped aluminum oxygen compound portion comprises a carbon doped or a silicon and carbon doped aluminum oxygen compound portion which is formed by:
depositing an alloy portion comprising an aluminum-carbon-oxygen alloy on the semiconductor surface; depositing a second horizontal portion of the aluminum oxide layer over the alloy portion; and reacting the alloy portion and the second horizontal portion of the aluminum oxide layer employing an anneal process to form the carbon doped or the silicon and carbon doped aluminum oxygen compound portion.

8 . The method of claim 6 , wherein:
the vertical and horizontal portions of the aluminum oxide layer are formed at the same time by an atomic layer deposition process employing a same precursor gas and a same oxidizer gas; the atomic layer deposition process employs an organic precursor gas including at least one aluminum atom and an oxidizer gas; and the organic precursor gas and the oxidizer gas are alternately flowed into a process chamber including the semiconductor substrate during the atomic layer deposition process.

9 . The method of claim 8 , wherein:
the organic precursor gas comprises trimethylaluminum; the oxidizer gas comprises water vapor; the semiconductor substrate comprises a silicon-containing semiconductor material; the semiconductor surface is a surface of the silicon-containing semiconductor material; and the method further comprises treating the semiconductor surface to form a hydrogen-terminated surface prior to the atomic layer deposition process.

10 . The method of claim 4 , further comprising:
converting a surface portion of the semiconductor substrate located directly underneath the memory opening into a doped semiconductor portion prior to forming the aluminum oxide layer; and annealing the aluminum oxide layer to crystallize the aluminum oxide layer and to diffuse dopants from the doped semiconductor portion into the horizontal portion of the aluminum oxide layer.

11 . The method of claim 10 , wherein:
the dopants comprise at least one of carbon, nitrogen and fluorine; converting the surface portion of the semiconductor substrate into the doped semiconductor portion comprises ion implanting the dopants at an implantation angle that is substantially parallel to the sidewall of the memory opening or a plasma doping the surface portion of the semiconductor substrate

12 . The method of claim 1 , wherein forming the aluminum oxide layer comprises:
forming the aluminum oxide layer having the horizontal portion in contact with a single crystal silicon surface at the bottom of the memory opening and the vertical portion on the sidewall surface of the memory opening; converting the horizontal portion of the aluminum oxide layer into a doped aluminum oxygen compound portion by implanting dopants into the horizontal portion of the contiguous layer such that the horizontal portion has both the different composition and the different structure from the undoped aluminum oxide vertical portion of the aluminum oxide layer; and annealing the aluminum oxide layer to at least partially crystallize the aluminum oxide layer.

13 . The method of claim 12 , wherein the dopants increase an etch rate of the doped aluminum oxygen compound portion relative to aluminum oxide by at least one of introducing structural defects into the doped aluminum oxygen compound portion or by changing the composition of aluminum oxide in the horizontal portion.

14 . The method of claim 12 , wherein:
the dopants comprise at least one element selected from, or a compound of at least one element selected from, helium, neon, argon, krypton, hydrogen, carbon, nitrogen, and fluorine; and the dopants are implanted by an ion implantation process at an implantation angle that is substantially parallel to the sidewall of the memory opening.

15 . The method of claim 14 , wherein:
the dopants comprise carbon; annealing the aluminum oxide layer converts the horizontal portion to aluminum carbonate; and selectively etching the horizontal portion selective to the vertical portion comprises selectively etching the aluminum carbonate horizontal portion selective to the aluminum oxide vertical portion.

16 . The method of claim 14 , wherein:
the dopants comprise fluorine; annealing the aluminum oxide layer sublimates a volatile aluminum trifluoride compound from the horizontal portion such that the horizontal portion becomes aluminum poor compared to the vertical portion; and selectively etching the horizontal portion selective to the vertical portion comprises selectively etching the aluminum poor horizontal portion selective to the aluminum rich vertical portion.

17 . The method of claim 14 , wherein:
the dopants comprise nitrogen; annealing the aluminum oxide layer forms a polycrystalline aluminum oxide vertical portion and leaves an amorphous nitrogen doped aluminum oxide horizontal portion; and selectively etching the horizontal portion selective to the vertical portion comprises selectively etching the amorphous horizontal portion selective to the polycrystalline vertical portion.

18 . The method of claim 1 , further comprising forming a dielectric spacer having a cavity directly on the sidewall surface of the memory opening, wherein:
the aluminum oxide layer is formed directly on an inner sidewall of the dielectric spacer; and a semiconductor surface is physically exposed in the cavity.

19 . The method of claim 18 , further comprising:
forming a memory material layer directly on the aluminum oxide layer and the semiconductor surface; forming a tunneling dielectric layer on the memory material layer; anisotropically etching the memory material layer and the tunneling dielectric layer to form an opening therein, wherein the semiconductor surface is physically e

Assignees

• Sandisk Technologies Inc

Inventors

• Sharangpani Rahul
• Koka Sateesh
• Makala Raghuveer S
• Ranganathan Srikanth
• JUANITAS Mark
• Alsmeier Johann

Classifications

• H10P50/285

  of materials not containing Si, e.g. PZT or Al2O3 · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P30/40

  into insulating materials · CPC title

• H10P14/69391

  the material containing aluminium, e.g. Al2O3 · CPC title

• H10P14/6544

  to change the morphology of the insulating materials, e.g. transformation of an amorphous layer into a crystalline layer · CPC title