Monitoring system and operating method thereof
US-2024419144-A1 · Dec 19, 2024 · US
having two radices, e.g. binary-coded-decimal code
having two radices, e.g. binary-coded-decimal code · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H03M7/12 |
| Official title | having two radices, e.g. binary-coded-decimal code |
| Display label | having two radices, e.g. binary-coded-decimal code |
| Total patents | 31 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2016 | 8 |
| 2017 | 7 |
| 2018 | 4 |
| 2019 | 1 |
| 2020 | 3 |
| 2021 | 3 |
| 2022 | 1 |
| 2023 | 1 |
| 2024 | 3 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Bitstream filter
US-12051215-B1 · Jul 30, 2024 · US
Readout circuit with charge dump circuit
US-11901864-B1 · Feb 13, 2024 · US
Reduced logic conversion of binary integers to binary coded decimals
US-2023308113-A1 · Sep 28, 2023 · US
Parallel rounding for conversion from binary floating point to binary coded decimal
US-11221826-B2 · Jan 11, 2022 · US
Parallelized rounding for decimal floating point to binary coded decimal conversion
US-11210064-B2 · Dec 28, 2021 · US
Parallel rounding for conversion from binary floating point to binary coded decimal
US-2021034329-A1 · Feb 4, 2021 · US
Parallelized rounding for decimal floating point to binary coded decimal conversion
US-2021034328-A1 · Feb 4, 2021 · US
Slave device enhancing data rate of DSI3 bus
US-10756925-B2 · Aug 25, 2020 · US
Slave device enhancing data rate of dsi3 bus
US-2020153653-A1 · May 14, 2020 · US
Method and system to convert globally unique identifiers to electronic data interchange document identifiers
US-10536162-B2 · Jan 14, 2020 · US
Coding method, coding device, decoding method, and decoding device
US-10447295-B2 · Oct 15, 2019 · US
Coding method, coding device, decoding method, and decoding device
US-2018226986-A1 · Aug 9, 2018 · US
Method and system to convert globally unique identifiers to electronic data interchange document identifiers
US-2018219964-A1 · Aug 2, 2018 · US
Apparatus and method for vector processing
US-9916130-B2 · Mar 13, 2018 · US
Exponent monitoring
US-9886239-B2 · Feb 6, 2018 · US
Apparatus and method for performing conversion operation
US-9778906-B2 · Oct 3, 2017 · US
Data processing apparatus and method using programmable significance data
US-9766857-B2 · Sep 19, 2017 · US
Vector operands with component representing different significance portions
US-9766858-B2 · Sep 19, 2017 · US
Exception generation when generating a result value with programmable bit significance
US-9703529-B2 · Jul 11, 2017 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H03M7/12?
- CPC H03M7/12 is the Cooperative Patent Classification code for “having two radices, e.g. binary-coded-decimal code.”
- How many patents are filed under CPC H03M7/12 (having two radices, e.g. binary-coded-decimal code)?
- Our database includes 31 publications tagged with this CPC code.
- Is patent activity under CPC H03M7/12 growing?
- Publication counts under this code: 1 in 2023 vs 3 in 2024 (latest complete years).