Managing prefetch requests based on stream information for previously recognized streams
US-2021406184-A1 · Dec 30, 2021 · US
using program counter relative addressing
using program counter relative addressing · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F9/324 |
| Official title | {using program counter relative addressing} |
| Display label | using program counter relative addressing |
| Total patents | 106 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 8 |
| 2016 | 6 |
| 2017 | 7 |
| 2018 | 9 |
| 2019 | 11 |
| 2020 | 17 |
| 2021 | 9 |
| 2022 | 14 |
| 2023 | 8 |
| 2024 | 8 |
| 2025 | 7 |
| 2026 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Dataflow Triggered Tasks for Accelerated Deep Learning
US-2021056400-A1 · Feb 25, 2021 · US
Wavelet representation for accelerated deep learning
US-2020364546-A1 · Nov 19, 2020 · US
Debugging of prefixed code
US-10810104-B2 · Oct 20, 2020 · US
Allocation of Memory
US-2020264931-A1 · Aug 20, 2020 · US
Allocation of Memory
US-2020264808-A1 · Aug 20, 2020 · US
Program loop control
US-10747536-B2 · Aug 18, 2020 · US
Method for executing a machine code of a secure function
US-2020257805-A1 · Aug 13, 2020 · US
Data structure descriptors for deep learning acceleration
US-10726329-B2 · Jul 28, 2020 · US
Compound instruction set architecture for a neural inference chip
US-2020167158-A1 · May 28, 2020 · US
An apparatus and method for interpreting permissions associated with a capability
US-2020142700-A1 · May 7, 2020 · US
Task synchronization for accelerated deep learning
US-2020133741-A1 · Apr 30, 2020 · US
Handling modifications to permitted program counter ranges in a data processing apparatus
US-10635445-B2 · Apr 28, 2020 · US
Instruction prefetch halting upon predecoding predetermined instruction types
US-10620953-B2 · Apr 14, 2020 · US
Dataflow triggered tasks for accelerated deep learning
US-10614357-B2 · Apr 7, 2020 · US
Debugging of prefixed code
US-10585782-B2 · Mar 10, 2020 · US
Call-path-indexed branch prediction structure
US-2020050459-A1 · Feb 13, 2020 · US
An apparatus and method for managing a capability domain
US-2020050454-A1 · Feb 13, 2020 · US
Apparatus and method for managing bounded pointers
US-10528490-B2 · Jan 7, 2020 · US
Wavelet representation for accelerated deep learning
US-10515303-B2 · Dec 24, 2019 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F9/324?
- CPC G06F9/324 is the Cooperative Patent Classification code for “using program counter relative addressing.”
- How many patents are filed under CPC G06F9/324 (using program counter relative addressing)?
- Our database includes 106 publications tagged with this CPC code.
- Is patent activity under CPC G06F9/324 growing?
- Publication counts under this code: 8 in 2024 vs 7 in 2025 (latest complete years).