Quality evaluation method for silicon wafer, and silicon wafer and method of producing silicon wafer using the method

Patent metadata

Field	Value
Publication number	US-9995693-B2
Application number	US-201615189309-A
Country	US
Kind code	B2
Filing date	Jun 22, 2016
Priority date	Jun 26, 2015
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

After determining the precipitated oxygen concentration and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; the critical shear stress τ cri at which slip dislocations are formed in the silicon wafer in the device fabrication process is determined based on the obtained precipitated oxygen concentration and residual oxygen concentration; and the obtained critical shear stress τ cri and the thermal stress τ applied to the silicon wafer in the heat treatment of the device fabrication process are compared, thereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress τ is equal to or more than the critical shear stress τ cri , or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress τ is less than the critical shear stress τ cri .

First claim

The invention claimed is:

1. A quality evaluation method for a silicon wafer, comprising:
determining a precipitated oxygen concentration and a residual oxygen concentration in the silicon wafer after heat treatment performed in a device fabrication process;
determining a critical shear stress τ cri at which slip dislocations are formed in the silicon wafer in the device fabrication process based on the determined precipitated oxygen concentration and residual oxygen concentration; and
comparing the determined critical shear stress τ cri to a thermal stress τ applied to the silicon wafer in the heat treatment of the device fabrication process, whereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress τ is equal to or more than the critical shear stress τ cri , or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress τ is less than the critical shear stress τ cri ,
wherein:
τ cri =24.6×(1/Δ O i )+7.0×10 −5 ×C O ×exp(0.91 eV/kT)

where:
ΔO i =the precipitated oxygen concentration,
C O =the residual oxygen concentration,
T=the temperature of the heat treatment, and
k=the Boltzmann constant.

2. The quality evaluation method for a silicon wafer according to claim 1 , wherein determining the precipitated oxygen concentration ΔO i and the residual oxygen concentration C O after heat treatment in the device fabrication process is performed by measuring the precipitated oxygen concentration and the residual oxygen concentration in the silicon wafer after the heat treatment performed on the silicon wafer in the device fabrication process.

3. The quality evaluation method for a silicon wafer according to claim 1 , wherein determining the precipitated oxygen concentration and the residual oxygen concentration C O after the heat treatment in the device fabrication process is performed by simulation calculations.

4. The quality evaluation method for a silicon wafer according to claim 1 , wherein the thermal stress τ is estimated based on a temperature distribution in a radial direction of the silicon wafer having been heated in a heat treatment unit.

5. The quality evaluation method for a silicon wafer according to claim 1 , wherein the thermal stress τ is estimated by simulation calculations.

6. A method of producing a silicon wafer, comprising:
growing a single crystal silicon ingot under growing conditions that allow a silicon wafer to be obtained, which wafer is determined to have no slip dislocations formed in a device fabrication process by the quality evaluation method for a silicon wafer, according to claim 1 ; and
subjecting the grown single crystal silicon ingot to a wafer processing process.

7. The method of producing a silicon wafer according to claim 6 , wherein the precipitated oxygen concentration after heat treatment in the device fabrication process is 0.06×10 17 atoms/cm 3 or more and 0.8×10 17 atoms/cm 3 or less.

8. The method of producing a silicon wafer according to claim 6 , wherein the residual oxygen concentration after heat treatment in the device fabrication process is 10×10 17 atoms/cm 3 or more and 18×10 17 atoms/cm 3 or less.

Assignees

• Sumco Corp

Inventors

• Fujise Jun
• Ono Toshiaki

Classifications

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P36/20

  Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body · CPC title

• G01N21/3563

  for analysing solids; Preparation of samples therefor · CPC title

• C30B33/00

  After-treatment of single crystals or homogeneous polycrystalline material with defined structure (C30B31/00 takes precedence) · CPC title

• G01N2021/3568

  applied to semiconductors, e.g. Silicon · CPC title