Process for making semiconductor dies, chips, and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on test wafers that include multiple means/steps for enabling NC detection of GATECNT-GATE via opens

Patent metadata

Field	Value
Publication number	US-9953889-B1
Application number	US-201615281491-A
Country	US
Kind code	B1
Filing date	Sep 30, 2016
Priority date	Dec 16, 2015
Publication date	Apr 24, 2018
Grant date	Apr 24, 2018

Abstract

Improved processes for manufacturing semiconductor wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured to target/expose a variety of open-circuit, short-circuit, leakage, and/or excessive resistance failure modes. Such processes include evaluating one or more Designs of Experiments (“DOEs”), each comprised of multiple NCEM-enabled fill cells, in at least two variants, targeted to the same failure mode. Such DOEs include multiple means/steps for enabling non-contact (NC) detection of GATECNT-GATE via opens.

First claim

What we claim in this application is:

1. A method for making integrated circuits (ICs), comprising at least:
(a) performing initial processing steps to produce a test wafer that includes a first Design of Experiments (DOE) of Non-Contact Electrical Measurement (NCEM)-enabled, gate contact (GATECNT)-gate (GATE)-via-open-configured fill cells, said initial processing steps including:
(i) patterning, on the test wafer, a first means for enabling NC detection of GATECNT-GATE via opens; and,
(ii) patterning, on the test wafer, a second means for enabling NC detection of GATECNT-GATE via opens;
wherein the first and second means for enabling NC detection of GATECNT-GATE via opens are different;

(b) determining a presence or absence of GATECNT-GATE via opens on the test wafer by:
performing a voltage contrast examination of NCEM-enabled fill cells in the first DOE, including at least the first and second means for enabling NC detection of GATECNT-GATE via opens; and,

(c) using the results from step (b) to select NCEM-enabled fill cells for inclusion on a subsequent product wafer.

2. A method for making ICs, as defined in claim 1 ,
wherein step (c) includes:
selecting, for inclusion on the product wafer, a plurality of NCEM-enabled, GATECNT-GATE-via-open-configured fill cells, if step (b) indicated a presence of any GATECNT-GATE via opens.

3. A method for making ICs, as defined in claim 1 ,
wherein step (c) includes:
omitting, from inclusion on the product wafer, any NCEM-enabled, GATECNT-GATE-via-open-configured fill cells, if step (b) indicated an absence of any GATECNT-GATE via opens.

4. A method for making ICs, as defined in claim 1 , wherein the first and second means for enabling NC detection of GATECNT-GATE via opens are both selected from the list consisting of:
a A_PDF_VCI_FILL 8 _ 9 S 101 _ 0004 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 16 _ 9 S 101 _ 0004 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 32 _ 9 S 101 _ 0004 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 64 _ 9 S 101 _ 0004 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 8 _ 9 S 101 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 16 _ 9 S 101 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 32 _ 9 S 101 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 64 _ 9 S 101 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 8 _ 9 S 107 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 16 _ 9 S 107 _ 0002 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 32 _ 9 S 107 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 64 _ 9 S 107 _ 0003 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 8 _ 9 S 111 _ 0001 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 16 _ 9 S 111 _ 0001 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a A_PDF_VCI_FILL 32 _ 9 S 111 _ 0001 _ 1 means for enabling NC detection of GATECNT-GATE via opens; and,
a A_PDF_VCI_FILL 64 _ 9 S 111 _ 0001 _ 1 means for enabling NC detection of GATECNT-GATE via opens.

5. A method for making ICs, as defined in claim 1 , wherein the first and second means for enabling NC detection of GATECNT-GATE via opens are both selected from the list consisting of:
a C_V 682 _PDF_VCI_ 16 _ 2000140 _ 01 means for enabling NC detection of GATECNT-GATE via opens;
a C_V 682 _PDF_VCI_ 16 _ 2002240 _ 34 means for enabling NC detection of GATECNT-GATE via opens;
a C_V 682 _PDF_VCI_ 16 _ 2004340 _ 67 means for enabling NC detection of GATECNT-GATE via opens;
a C_V 682 _PDF_VCI_ 16 _ 2000146 _ 01 means for enabling NC detection of GATECNT-GATE via opens;
a C_V 682 _PDF_VCI_ 16 _ 2002246 _ 34 means for enabling NC detection of GATECNT-GATE via opens; and,
a C_V 682 _PDF_VCI_ 16 _ 2004346 _ 67 means for enabling NC detection of GATECNT-GATE via opens.

6. A method for making ICs, as defined in claim 1 , wherein the first and second means for enabling NC detection of GATECNT-GATE via opens are both selected from the list consisting of:
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0105 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0037 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0034 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0097 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0088 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0087 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0019 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0083 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0008 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0070 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0001 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0065 _ 1 means for enabling NC detection of GATECNT-GATE via opens; and,
a D_PDF_VCI_VFILL 4 _ 12 S 01 _ 0052 _ 1 means for enabling NC detection of GATECNT-GATE via opens.

7. A method for making ICs, as defined in claim 1 , wherein the first and second means for enabling NC detection of GATECNT-GATE via opens are both selected from the list consisting of:
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0053 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0051 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0026 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0022 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0021 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0020 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0019 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0018 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0017 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0008 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0007 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0006 _ 1 means for enabling NC detection of GATECNT-GATE via opens; and,
a E_PDF_VCI_FILL 8 _ 17 S 1 _ 0005 _ 1 means for enabling NC detection of GATECNT-GATE via opens.

8. A method for making ICs, as defined in claim 1 , wherein the first and second means for enabling NC detection of GATECNT-GATE via opens are both selected from the list consisting of:
a F_PDF_VCI_FILL 08 _ 24 S 1 _ 0084 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a F_PDF_VCI_FILL 08 _ 24 S 2 _ 0047 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a F_PDF_VCI_FILL 64 _ 24 S 1 _ 0080 _ 1 means for enabling NC detection of GATECNT-GATE via opens;
a F_PDF_VCI_FILL 64 _ 24 S 1 _ 0079 _ 1 means

Assignees

• Pdf Solutions Inc

Inventors

• Lam Stephen
• Ciplickas Dennis
• Brozek Tomasz
• Cheng Jeremy
• Comensoli Simone
• De Indranil
• Doong Kelvin
• Eisenmann Hans
• Fiscus Timothy
• Haigh Jonathan
• Hess Christopher
• Kibarian John
• Lee Sherry
• Liao Marci
• Lin Sheng-Che
• Matsuhashi Hideki
• Michaels Kimon
• O'Sullivan Conor
• Rauscher Markus
• Rovner Vyacheslav
• Strojwas Andrzej
• Strojwas Marcin
• Taylor Carl
• Vallishayee Rakesh
• Weiland Larg
• Yokoyama Nobuharu

Classifications

• H10P74/277

  Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title

• H10P74/23 Primary

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10P74/238 Primary

  comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement · CPC title