Semiconductor device and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-9947782-B2
Application number	US-201013634860-A
Country	US
Kind code	B2
Filing date	Dec 20, 2010
Priority date	Mar 23, 2010
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.

First claim

The invention claimed is:

1. A semiconductor device having a current path, comprising:
a semiconductor layer constituting at least a part of said current path and made of silicon carbide; and
a substrate that has a first surface supporting said semiconductor layer and a second surface opposite to said first surface, that is made of silicon carbide having a 4H type single-crystal structure, and that has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement,
wherein said substrate has said physical property at said second surface.

2. The semiconductor device according to claim 1 , further comprising an insulating film on said semiconductor layer.

3. The semiconductor device according to claim 2 , wherein said insulating film is made of an oxide of the material of said semiconductor layer.

4. The semiconductor device according to claim 2 , wherein said insulating film is a thermal oxidation film.

5. The semiconductor device according to claim 1 , wherein said substrate constitutes a part of said current path.

6. The semiconductor device according to claim 1 , wherein said first surface has an off angle of not less than 50° and not more than 65° relative to a {0001} plane.

7. The semiconductor device according to claim 6 , wherein said off angle has an off orientation falling within a range of ±5° or smaller relative to a <11-20> direction.

8. The semiconductor device according to claim 6 , wherein said off angle has an off orientation falling within a range of ±5° or smaller relative to a <01-10> direction.

9. The semiconductor device according to claim 8 , wherein said first surface has an off angle of not less than −3° and not more than +5° relative to a {03-38} plane in the <01-10> direction.

10. The semiconductor device according to claim 9 , wherein said first surface has an off angle of not less than −3° and not more than +5° relative to a (0-33-8) plane in the <01-10> direction.

11. The semiconductor device according to claim 1 , further comprising a base layer supporting said substrate and made of silicon carbide.

Assignees

• Harada Shin
• Sasaki Makoto
• Nishiguchi Taro
• Okita Kyoko
• Wada Keiji
• Miyazaki Tomihito
• Sumitomo Electric Industries

Inventors

• Harada Shin
• Sasaki Makoto
• Nishiguchi Taro
• Okita Kyoko
• Wada Keiji
• Miyazaki Tomihito

Classifications

• H10P90/1914 Primary

  using bonding · CPC title

• H10P90/12

  Preparing bulk and homogeneous wafers · CPC title

• H10P90/00

  Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement · CPC title

• H10P90/1904

  Preparing vertically inhomogeneous wafers · CPC title

• H10P90/1902

  Preparing horizontally inhomogeneous wafers · CPC title