Method of measuring an adhesive force of interlayer adhesive layer in tensile mode for stacked semiconductor device and apparatus for measuring the same

US9945772B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9945772-B2
Application numberUS-201615002215-A
CountryUS
Kind codeB2
Filing dateJan 20, 2016
Priority dateMar 2, 2015
Publication dateApr 17, 2018
Grant dateApr 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method includes providing a device under test, which includes a lower test layer and an upper test layer that is stacked on the lower test layer and includes an overhang protruding past an edge of the lower test layer by a predetermined length, fixing the lower test layer onto a mounting stage, and measuring adhesive force of an interlayer adhesive layer in a tensile mode by applying a load to a bottom surface of the overhang of the upper test layer in a first direction. An apparatus includes a mounting stage fixing the device under test, a load applying tip applying the load to the bottom surface of the overhang, a location adjuster adjusting a distance between the device under test and the load carrying tip, a load cell detecting a magnitude of the applied load, and a controller controlling the location adjuster and the load cell.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of measuring an adhesive force of an interlayer adhesive layer for a stacked semiconductor device, the method comprising: providing a device under test, the device under test comprising: a lower test layer; an upper test layer stacked on the lower test layer and including an overhang that protrudes past an edge of the lower test layer by a predetermined length; and the interlayer adhesive layer disposed between the lower test layer and the upper test layer and bonded to the lower test layer and the upper test layer; fixing the lower test layer onto a mounting stage; and measuring the adhesive force of the interlayer adhesive layer in tensile mode by applying a load to a bottom surface of the overhang of the upper test layer in a first direction. 2. The method of claim 1 , wherein each of the lower test layer and the upper test layer is a device layer, a substrate, two or more stacked device layers, two or more stacked substrates, or a stacked structure including one or more device layers and one or more substrates. 3. The method of claim 2 , wherein the device layer comprises a semiconductor chip, a semiconductor die, a wafer, an encapsulated package, or a combination thereof, and wherein the substrate comprises a wafer, a lead frame, a die paddle, an interposer, a printed circuit board, a flexible printed circuit board, a film-type wire, or a combination thereof. 4. The method of claim 1 , wherein the interlayer adhesive layer comprises an adhesive film or an adhesive paste. 5. The method of claim 1 , wherein the device under test is an intermediate structure from a fabrication process of a semiconductor package, the semiconductor package comprising a plurality of device layers of a same type or of different types. 6. The method of claim 1 , wherein providing the device under test comprises: performing any one of a rotation process, a translation process, a flip process, and a combination thereof to a first test layer and a second test layer, such that one of the first and second test layers corresponds to the upper test layer and the other of the first and second test layers corresponds to the lower test layer. 7. The method of claim 1 , wherein the bottom surface of the overhang of the upper test layer corresponds to a surface of a passivation layer or a reinforcement layer. 8. The method of claim 1 , wherein the device under test has a wedge structure such that a length of the lower test layer in a second direction is greater than a length of the overhang of the upper test layer in the second direction, the second direction being perpendicular to the first direction. 9. The method of claim 1 , wherein the load is applied by a load applying tip, and wherein the load applying tip comprises a protruding portion, the protruding portion including a convexly curved surface that contacts the bottom surface of the overhang during the application of the load. 10. The method of claim 9 , wherein a contact interface between at least a portion of the convexly curved surface and the bottom surface of the overhang is a linear contact interface that extends in a second direction, the second direction corresponding to a lengthwise direction of the overhang. 11. The method of claim 10 , wherein, the base is tilted around an axis of rotation in a third direction perpendicular to the first and second directions, the third direction corresponding to a propagation direction of crack in the interlayer adhesive layer. 12. The method of claim 10 , wherein the load applying tip further comprises: a tilt supporting portion disposed between the support and the base and separating the support and the base from each other; and a trench accommodating the tilt supporting portion and allowing the tilt supporting portion to rotate about the axis of rotation to tilt the base, the trench being provided on either the support or the base. 13. The method of claim 12 , wherein a cross-section of the tilt supporting portion has an arc shape or a circular shape with a first curvature, the cross-section being perpendicular to a third direction, the third direction being perpendicular to the first and second directions and corresponding to a widthwise direction of the overhang, and wherein the trench has a second curvature identical to the first curvature of the tilt supporting portion. 14. The method of claim 12 , wherein the tilt supporting portion and the trench extend in the third direction. 15. The method of claim 1 , wherein the load is applied by a load applying tip, wherein the load applying tip comprises a support and a base, the base being mounted on the support, wherein the base contacts the bottom surface of the overhang, and wherein the base is tilted according to a tilt of the overhang. 16. The method of claim 1 , wherein measuring the adhesive force comprises calculating an energy release rate according to a crack propagation at a first bonding interface of the interlayer adhesive layer and the upper test layer, a second bonding interface of the interlayer adhesive layer and the lower test layer, or both. 17. The method of claim 16 , wherein the energy release rate is calculated at a crack initiation time or a crack arresting time. 18. The method of claim 16 , wherein the adhesive force in the tensile mode is defined by an energy release rate at a first crack arresting time, the method further comprising: obtaining a load-displacement graph that includes a first load increase line, a load decrease line, and a second load increase line, the load decrease line being subsequent to the first load increase line, the second load increase line being subsequent to the load decrease line; and determining an intersection point between the load decrease line and the second load increase line, the intersection point corresponding to the first crack arresting time.

Assignees

Inventors

Classifications

  • between stacked chips · CPC title

  • between stacked chips · CPC title

  • Die-attach connectors and bond wires · CPC title

  • H10P74/203Primary

    Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Testing static or dynamic balance of machines or structures · CPC title

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What does patent US9945772B2 cover?
A method includes providing a device under test, which includes a lower test layer and an upper test layer that is stacked on the lower test layer and includes an overhang protruding past an edge of the lower test layer by a predetermined length, fixing the lower test layer onto a mounting stage, and measuring adhesive force of an interlayer adhesive layer in a tensile mode by applying a load t…
Who is the assignee on this patent?
Sk Hynix Inc, Industry Academic Cooperation Foundation Yeungnam Univ
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).