Oxide thin film transistor and method of fabricating the same

Patent metadata

Field	Value
Publication number	US-9941410-B2
Application number	US-201314026769-A
Country	US
Kind code	B2
Filing date	Sep 13, 2013
Priority date	May 14, 2013
Publication date	Apr 10, 2018
Grant date	Apr 10, 2018

Abstract

The present disclosure relates to an oxide thin film transistor and a fabricating method thereof. In the oxide thin film transistor, which uses amorphous zinc oxide (ZnO) semiconductor as an active layer, damage to the oxide semiconductor due to dry etching may be minimized by forming source and drain electrodes in a multilayered structure having at least two layers, and improving stability and reliability of a device by employing a dual passivation layer structure, which includes a lower layer for overcoming an oxygen deficiency and an upper layer to minimize effects of an external environment on the multilayered source and drain electrodes.

First claim

What is claimed is:

1. A thin film transistor, comprising:
a gate electrode on a substrate;
a gate insulating layer on the gate electrode;
an active layer on the gate insulating layer, the active layer made of an oxide semiconductor;
a lower conductive layer on the active layer,
wherein the lower conductive layer comprises a source electrode, a drain electrode, and wherein first and second portions of the lower conductive layer are oxidized and converted to first and second portions of an in-situ protection layer, so that the first portion of the in-situ protection layer is directly on a back-channel region of the active layer, and the second portion of the in-situ protection layer is at a side of the source electrode or the drain electrode and is directly on and contacting the gate insulating layer;
an upper conductive layer directly on the lower conductive layer; and
a lower passivation layer directly on the in-situ protection layer and the upper conductive layer.

2. The thin film transistor of claim 1 , wherein the lower conductive layer covers a side portion of the active layer.

3. The thin film transistor of claim 1 , wherein the in-situ protection layer includes TiOx (where x=2±∈, where ∈ is sufficiently small to maintain semiconductor conductivity in TiOx) and the lower conductive layer includes Ti.

4. A method of manufacturing a thin film transistor comprising:
forming a gate electrode on a substrate;
forming a gate insulating layer on the gate electrode;
forming an active layer on the gate insulating layer, the active layer made of an oxide semiconductor;
forming a lower conductive layer on the active layer,
wherein the lower conductive layer comprises a source electrode, a drain electrode, a first portion, and a second portion;
oxidizing the first and second portions of the lower conductive layer to convert first and second portions of an in-situ protection layer, so that the first portion of the in-situ protection layer is formed directly on a back-channel region of the active layer, and the second portion of the in-situ protection layer is formed at a side of the source electrode or the drain electrode and is directly formed on and contacting the gate insulating layer;
forming an upper conductive layer directly on the lower conductive layer; and
forming a lower passivation layer directly on the in-situ protection layer and the upper conductive layer.

5. The method of claim 4 , further comprising forming an upper passivation layer on the lower passivation layer.

6. The method of claim 4 , wherein the lower passivation layer is formed of a porous metal oxide insulating layer.

7. The thin film transistor of claim 1 , further comprising an upper passivation layer on the lower passivation layer.

8. The thin film transistor of claim 1 , wherein the lower passivation layer contains oxygen equal to or larger than 1E+20 atoms/cm 3 , and hydrogen equal to or smaller than 1E+20 atoms/cm 3 for curing oxygen deficiency at a back channel region of the active layer.

9. The thin film transistor of claim 1 , wherein the lower passivation layer is a porous metal oxide insulating layer.

Assignees

• Lg Display Co Ltd

Inventors

• Bae Jonguk

Classifications

• H01L29/78606

  Electricity · mapped topic

• H01L29/78636 Primary

  Electricity · mapped topic

• H01L29/66969

  Electricity · mapped topic

• H01L29/78693

  Electricity · mapped topic

• H10D30/6756

  Amorphous oxide semiconductors · CPC title