Thin-film transistor substrate, related light-emitting apparatus, and related manufacturing method

Patent metadata

Field	Value
Publication number	US-9502484-B2
Application number	US-201414161243-A
Country	US
Kind code	B2
Filing date	Jan 22, 2014
Priority date	Jun 26, 2013
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

A thin-film transistor substrate may include an electrical wiring structure that includes a first electrode, which may be a source electrode, a drain electrode, or a capacitor electrode. The thin-film transistor substrate may further include a first insulating layer that directly contacts a first side of the first electrode. The thin-film transistor substrate may further include a second insulating layer that directly contacts a second side of the first electrode opposite the first side of the first electrode. The thin-film transistor substrate may further include a first filling layer that is disposed between the first insulating layer and the second insulating layer.

First claim

What is claimed is:

1. A thin film transistor (TFT) substrate comprising:
a substrate comprising a first region, on which no TFT is disposed, and a second region;
a TFT disposed on the second region of the substrate, the TFT including a semiconductor layer, a gate electrode, a source electrode electrically connected to the semiconductor layer through a first contact hole in an insulating layer covering the gate electrode, and a drain electrode electrically connected to the semiconductor layer through a second contact hole in the insulating layer, a remaining part of the source electrode outside the first contact hole and a remaining part of the drain electrode outside the second contact hole directly contacting an upper surface of the insulating layer; and
a filling layer directly contacting at least one of a side surface of the source electrode and a side surface of the drain electrode, the side surface of the source electrode and the side surface of the drain electrode being above the insulating layer, wherein the filling layer does not cover either of a top surface of the source electrode and a top surface of the drain electrode, and wherein the filling layer does not directly contact the gate electrode,
wherein a maximum height of the filling layer from a top surface of the substrate on the first region of the substrate is less than a maximum height of the filling layer from the top surface of the substrate on the second region of the substrate.

2. A thin film transistor (TFT) substrate comprising:
a substrate comprising a first region, on which no TFT is disposed, and a second region;
a TFT disposed on the second region of the substrate, the TFT including a gate electrode, a source electrode, and a drain electrode;
a protective film disposed on the first and second regions of the substrate so that the protective film covers the TFT, wherein the protective film directly contacts at least one of a top surface of the source electrode and a top surface of the drain electrode, and wherein the protective film does not directly contact the gate electrode; and
a filling layer disposed on the protective film, wherein the filling layer does not cover a portion of a top surface of the protective film corresponding to both of the top surface of the source electrode and the top surface of the drain electrode,
wherein a maximum height of the filling layer from a top surface of the substrate on the first region of the substrate is less than a maximum height of the filling layer from the top surface of the substrate on the second region of the substrate.

3. The TFT substrate of claim 1 , further comprising a protective film disposed to correspond to the first and second regions of the substrate so that the protective film covers the TFT and the filling layer.

4. The TFT substrate of claim 3 , wherein the filling layer completely covers the side surface of the source electrode of the TFT and completely covers the side surface of the drain electrode of the TFT.

5. The TFT substrate of claim 1 , wherein a top surface of the filling layer is convex.

6. The TFT substrate of claim 1 , wherein a height of the filling layer corresponds to a height of the TFT so that a top surface of the filling layer is flush with a top surface of the TFT.

7. The TFT substrate of claim 1 , wherein the filling layer comprises an organic material.

8. The TFT substrate of claim 1 , further comprising a planarization film that is disposed to cover the filling layer and the TFT.

9. The TFT substrate of claim 1 , wherein the filling layer comprises a first filling layer and a second filling layer that have different heights.

10. The TFT substrate of claim 1 , wherein the filling layer comprises a first filling layer and a second filling layer that are spaced apart from each other.

11. The TFT substrate of claim 1 , further comprising a pixel electrode that is electrically connected to the TFT.

12. An organic light-emitting apparatus comprising:
the thin film transistor (TFT) substrate of claim 11 ;
an intermediate layer disposed on the pixel electrode and comprising an emission layer; and
an opposite electrode disposed on the intermediate layer.

13. The organic light-emitting apparatus of claim 12 , wherein light from the emission layer is externally emitted through the opposite electrode.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Dong-Won

Classifications

• H10D86/0214

  using temporary substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D86/451

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10D30/6725 Primary

  having supplementary regions or layers for improving the flatness of the device · CPC title

• H10D86/0251 Primary

  characterised by increasing the uniformity of device parameters · CPC title