Method for manufacturing silicon carbide semiconductor device
US-9450068-B2 · Sep 20, 2016 · US
US9934972B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9934972-B2 |
| Application number | US-201615288349-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 7, 2016 |
| Priority date | Oct 9, 2015 |
| Publication date | Apr 3, 2018 |
| Grant date | Apr 3, 2018 |
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A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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What is claimed is: 1. A method of manufacturing a semiconductor device, the method comprising forming a trench extending from a main surface into a crystalline silicon carbide semiconductor layer; forming a mask including a mask opening, the mask opening exposing the trench and a rim section of the main surface around the trench; amorphizing, by irradiation with a particle beam, a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion, wherein a vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion; and removing the amorphized first and second portions. 2. The method of claim 1 , wherein irradiation with the particle beam includes exposure to tilted particle beams tilted from a vertical direction perpendicular to the main surface at an angle, at which the mask shields a lower portion of a sidewall of the trench. 3. The method of claim 1 , wherein irradiation with the particle beam includes exposure to a vertical particle beam orthogonal to the main surface. 4. The method of claim 1 , wherein forming the mask includes forming first mask sections tapering with decreasing distance to the mask opening. 5. The method of claim 1 , wherein forming the mask includes forming a precursor mask including a precursor mask opening for forming the trench and enlarging the precursor mask opening to form, from the precursor mask the mask exposing the trench and the rim section. 6. The method of claim 5 , wherein forming the precursor mask includes forming a first mask layer on the main surface and forming a second mask layer on the first mask layer, wherein the second mask layer has a higher etch resistivity than the first mask layer. 7. The method of claim 6 , wherein a first mask material of the first mask layer and a second material of the second mask layer contain identical constituents and the first material is denser than the second material. 8. The method of claim 5 , wherein forming the mask includes horizontally pulling back the precursor mask. 9. The method of claim 1 , wherein the mask and the amorphized first and second portions are removed contemporaneously. 10. The method of claim 1 , further comprising forming a trench gate structure in the trench, wherein a gate dielectric lines the trench. 11. The method of claim 1 , wherein after irradiation with the particle beam the first and second portions are fully amorphous. 12. A method of manufacturing a semiconductor device, the method comprising forming a mask on a crystalline silicon carbide semiconductor layer, wherein the mask includes a mask opening and a first mask section that tapers with decreasing distance to the mask opening; amorphizing, by irradiation with a particle beam, a first portion of the semiconductor layer exposed by the mask opening and a second portion in a vertical projection of the first mask section and directly adjoining to the first portion, wherein a vertical extension of the second portion gradually decreases with increasing distance to the first portion; and removing the amorphized first and second portions. 13. The method of claim 12 , wherein a reduction rate at which the vertical extension of the second portion decreases increases with decreasing distance to the first portion. 14. The method of claim 12 , further comprising forming, before forming the mask, a trench extending from the main surface into the semiconductor layer, wherein the mask opening is formed to expose the trench and a rim section of the main surface surrounding the trench. 15. The method of claim 12 , wherein an angle between a first interface between the mask and a non-amorphized third portion of the semiconductor layer and a second interface between the non-amorphized third portion and the amorphized second portion is at least 120 degree. 16. A method of manufacturing a semiconductor device, the method comprising forming a mask including a mask opening on a crystalline silicon carbide semiconductor layer; amorphizing, by irradiation with a particle beam, a first portion of the semiconductor layer exposed by the mask opening and a second portion in a vertical projection of the mask and directly adjoining to the first portion; removing the amorphized first and second portions; and repeating at least once amorphizing and removing of first and second portions to form a stepped recess, wherein the mask opening is enlarged before each amorphizing. 17. The method of claim 16 , wherein the mask is formed to include a first mask section that tapers with decreasing distance to the mask opening. 18. The method of claim 16 , wherein the particle beam includes ions and/or atoms selected from elements of group 14 and group 18. 19. The method of claim 16 , wherein the mask is a silicon mask. 20. The method of claim 16 , wherein the stepped recess includes steps of equal step height. 21. A method of manufacturing a semiconductor device, the method comprising forming a trench extending from a main surface into a crystalline silicon carbide semiconductor layer; forming a mask including a mask opening, the mask opening exposing the trench and a rim section of the main surface around the trench; irradiating, with a particle beam, a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion, wherein the particle beam damages a crystal lattice of the semiconductor layer in the first and second portions and a vertical extension of the second portion gradually decreases with increasing distance to the first portion; and removing the first and second portions.
of Group IV materials · CPC title
the semiconductor being silicon carbide · CPC title
Etching of wafers, substrates or parts of devices · CPC title
having a recessed gate, e.g. trench-gate IGBTs · CPC title
using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title
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