Method for fabricating a varistor device and varistor device

US9934892B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9934892-B2
Application numberUS-201415102645-A
CountryUS
Kind codeB2
Filing dateNov 13, 2014
Priority dateDec 24, 2013
Publication dateApr 3, 2018
Grant dateApr 3, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for fabricating a varistor device is presented. In an embodiment the method includes providing a base body for the varistor device, wherein the base body comprises a ceramic material, providing a basic material for a base metal electrode region on the base body, exposing the base body with the basic material to a temperature under a protective gas atmosphere such that the base metal electrode region is formed and firmly connected to the base body and completing the varistor device.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for fabricating a varistor device, the method comprising: providing a base body for the varistor device, wherein the base body comprises a ceramic material; providing the base body with a passivation, wherein the base body is provided with the passivation such that sites or surface regions of the base body remain free of the passivation; providing a basic material for a base metal electrode region on the base body, wherein the base body is provided with the passivation before the providing the basic material on the base body, and wherein the basic material is provided or applied in regions that are free of, or uncoated by, the passivation in order to provide one or more electrodes of the varistor device; exposing the base body with the basic material to a burn-in temperature, under a protective gas atmosphere, causing conversion of the base material into the base metal electrode region in the regions that are free of, or uncoated by, the passivation, such that the base metal electrode region is formed and firmly connected to the base body; and completing the varistor device by at least forming a coating or encapsulation. 2. The method according to claim 1 , wherein, before providing the basic material on the base body, providing the base body with a passivation. 3. The method according to claim 2 , wherein the base body is provided with the passivation such that sides or surface regions of the base body remain free and the basic material can, later on, be provided or applied in the free or uncoated regions in order to provide one or more electrodes of the varistor device. 4. The method according to claim 2 , wherein providing the base body with a passivation comprises providing the base body with a raw material, and, after the base body is provided with the raw material, curing the raw material at temperatures from 300° C. to 600° C. in order to form the passivation. 5. The method according to claim 1 , wherein providing the base body with the basic material comprises screen printing the base body with the basic material. 6. The method according to claim 1 , wherein exposing the base body to the temperature comprises exposing the base body to the temperature in a furnace with zones of different temperatures. 7. The method according to claim 6 , wherein the base body is exposed for a duration between 5 min and 30 min in a zone with temperatures between 450° C. and 800° C. such that the base metal electrode region is formed and firmly connected to the base body. 8. The method according to claim 1 , wherein, after exposing the base body to the temperature, providing the base body with solder contacts and/or solder straps. 9. A varistor device comprising: a ceramic base body, wherein the ceramic base body comprises two base metal electrode regions each connected to a main surface of two or more main surfaces of the ceramic base body; an electrode comprising a base metal electrode region, wherein the base metal electrode region is directly connected to the ceramic base body; a passivation directly connected to the ceramic base body, wherein the passivation is disposed only at an edge surface of the ceramic base body, and wherein the edge surface connects the two or more main surfaces of the ceramic base body; and an outer coating provided on the ceramic base body. 10. The varistor device according to claim 9 , wherein the base metal electrode region contains copper. 11. The varistor device according to claim 9 , further comprising a passivation directly connected to the ceramic base body. 12. The varistor device according to claim 11 , wherein the ceramic base body comprises two base metal electrode regions each connected to a main surface of the ceramic base body, wherein the passivation is only arranged at an edge surface of the ceramic base body, and wherein the edge surface connects the main surfaces of the ceramic base body. 13. The varistor device according to claim 11 , wherein the passivation is a lead-free glass, a ceramic material and/or an inorganic material. 14. The varistor device according to claim 9 , wherein the base metal electrode region is a layer with a thickness between 5 μm and 30 μm.

Assignees

Inventors

Classifications

  • H01C7/102Primary

    Varistor boundary, e.g. surface layers (H01C7/12 takes precedence) · CPC title

  • the terminals or tapping points being welded or soldered · CPC title

  • Precursor compositions therefor, e.g. pastes, inks, glass frits · CPC title

  • adapted for baking · CPC title

  • adapted for applying terminals · CPC title

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What does patent US9934892B2 cover?
A method for fabricating a varistor device is presented. In an embodiment the method includes providing a base body for the varistor device, wherein the base body comprises a ceramic material, providing a basic material for a base metal electrode region on the base body, exposing the base body with the basic material to a temperature under a protective gas atmosphere such that the base metal el…
Who is the assignee on this patent?
Epcos Ag
What technology area does this patent fall under?
Primary CPC classification H01C7/102. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 03 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).