Multilayer ceramic electronic component

US9478357B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9478357-B2
Application numberUS-201414549795-A
CountryUS
Kind codeB2
Filing dateNov 21, 2014
Priority dateMay 24, 2012
Publication dateOct 25, 2016
Grant dateOct 25, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic electronic component that has a multilayer portion having an outer layer portion adjacent region including an area in contact with an outer layer portion that forms a thermal-shock absorbing portion that includes curved ceramic layers and inner electrode layers smoothly varying in thickness from point to point. A region to an inside of the thermal-shock absorbing portion forms a normal multilayer portion that includes ceramic layers with less curvature than the ceramic layers in the thermal-shock absorbing portion and inner electrode layers with less variation in thickness from point to point in a direction along a principal surface of the outer layer portion than the inner electrode layers in the thermal-shock absorbing portion.

First claim

Opening claim text (preview).

The invention claimed is: 1. A multilayer ceramic electronic component comprising: an outer layer portion having one or more ceramic layers; a thermal-shock absorbing portion in contact with the outer layer portion and that includes curved ceramic layers and inner electrode layers varying in thickness from point to point in a direction along a principal surface of the outer layer portion; and a normal multilayer portion that includes ceramic layers with less curvature than the curved ceramic layers in the thermal-shock absorbing portion and inner electrode layers with less variation in thickness from point to point in the direction along the principal surface of the outer layer portion than the inner electrode layers in the thermal-shock absorbing portion. 2. The multilayer ceramic electronic component according to claim 1 , wherein, in the thermal-shock absorbing portion, a coefficient of variation of a thickness of any of the curved ceramic layers is 15% or less. 3. The multilayer ceramic electronic component according to claim 1 , wherein, in the thermal-shock absorbing portion, a coefficient of variation of a thickness of at least one of the inner electrode layers is 40% or more. 4. The multilayer ceramic electronic component according to claim 1 , wherein, in the thermal-shock absorbing portion, a coefficient of variation of a center-to-center distance between any pair of adjacent curved ceramic layers is 40% or more. 5. The multilayer ceramic electronic component according to claim 1 , wherein, in the thermal-shock absorbing portion, a coefficient of variation of a thickness of any of the curved ceramic layers is 15% or less, a coefficient of variation of a thickness of at least one of the inner electrode layers is 40% or more, and a coefficient of variation of a center-to-center distance between any pair of adjacent curved ceramic layers is 40% or more. 6. The multilayer ceramic electronic component according to claim 5 , wherein, in the normal multilayer portion, a coefficient of variation of a thickness of any of the ceramic layers is 15% or less, a coefficient of variation of a thickness of any of the inner electrode layers is 20% or less, and a coefficient of variation of a center-to-center distance between any pair of adjacent ceramic layers is 20% or less. 7. The multilayer ceramic electronic component according to claim 1 , wherein, in the normal multilayer portion, a coefficient of variation of a thickness of any of the ceramic layers is 15% or less. 8. The multilayer ceramic electronic component according to claim 1 , wherein, in the normal multilayer portion, a coefficient of variation of a thickness of any of the inner electrode layers is 20% or less. 9. The multilayer ceramic electronic component according to claim 1 , wherein, in the normal multilayer portion, a coefficient of variation of a center-to-center distance between any pair of adjacent ceramic layers is 20% or less. 10. The multilayer ceramic electronic component according to claim 1 , wherein in the normal multilayer portion, a coefficient of variation of a thickness of any of the ceramic layers is 15% or less, a coefficient of variation of a thickness of any of the inner electrode layers is 20% or less, and a coefficient of variation of a center-to-center distance between any pair of adjacent ceramic layers is 20% or less. 11. The multilayer ceramic electronic component according to claim 1 , wherein the curved ceramic layers are irregularly curved. 12. The multilayer ceramic electronic component according to claim 11 , wherein the thickness of each inner electrode varies in an irregular manner. 13. The multilayer ceramic electronic component according to claim 1 , wherein the thickness of each inner electrode varies in an irregular manner. 14. The multilayer ceramic electronic component according to claim 1 , wherein the inner electrode layers in the normal multilayer portion and the inner electrode layers in the thermal-shock absorbing portion have no breaks. 15. The multilayer ceramic electronic component according to claim 1 , wherein the multilayer ceramic electronic component is a surface-mount multilayer ceramic capacitor.

Assignees

Inventors

Classifications

  • comprising a plurality of layers stacked between terminals · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • Thick film varistors · CPC title

  • H01G4/258Primary

    Temperature compensation means · CPC title

  • Stacked capacitors (H01G4/33 takes precedence) · CPC title

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Frequently asked questions

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What does patent US9478357B2 cover?
A multilayer ceramic electronic component that has a multilayer portion having an outer layer portion adjacent region including an area in contact with an outer layer portion that forms a thermal-shock absorbing portion that includes curved ceramic layers and inner electrode layers smoothly varying in thickness from point to point. A region to an inside of the thermal-shock absorbing portion fo…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/258. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).