Circuit board

US9924589B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9924589-B2
Application numberUS-201514980395-A
CountryUS
Kind codeB2
Filing dateDec 28, 2015
Priority dateDec 26, 2014
Publication dateMar 20, 2018
Grant dateMar 20, 2018

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit board includes a first insulating layer having an upper surface on which mounting regions of electronic components and wiring patterns are provided, a metal core provided on the lower surface of the first insulating layer, in such a way as to vertically overlap with the mounting regions, and a second insulating layer provided on the lower surface of the first insulating layer, around the metal core. The lower surface of the metal core is exposed from the second insulating layer, the thermal conductivities of the first insulating layer and the metal core are higher than the thermal conductivity of the second insulating layer, and the hardness of the first insulating layer is higher than the hardness of the second insulating layer. Through holes that penetrate the insulating layers and that connect wiring patterns of the insulating layers are provided.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit board comprising: a first insulating layer having an upper surface on which a first mounting region of a first electronic component and a first wiring pattern is provided; a thermal conductor provided, on a lower surface of the first insulating layer, in such a way as to vertically overlap with at least the first mounting region; and a second insulating layer provided on the lower surface of the first insulating layer, around the thermal conductor, wherein a lower surface of the thermal conductor is exposed from the second insulating layer, wherein thermal conductivities of the first insulating layer and the thermal conductor are higher than a thermal conductivity of the second insulating layer, wherein a hardness of the first insulating layer is higher than a hardness of the second insulating layer, and wherein the circuit board further comprises a first through hole penetrating the first insulating layer and the second insulating layer. 2. The circuit board according to claim 1 , wherein a thickness of the first insulating layer is thinner than a thickness of the second insulating layer. 3. The circuit board according to claim 1 , wherein the thermal conductivity of the thermal conductor is higher than the thermal conductivity of the first insulating layer. 4. The circuit board according to claim 1 , wherein the first mounting region is a plurality of the first mounting regions, the thermal conductor is provided over a wide range so as to overlap with the plurality of the first mounting regions provided on the upper surface of the first insulating layer. 5. The circuit board according to claim 1 , wherein the second insulating layer has a laminate structure, and wherein a second wiring pattern is provided on both a first inner layer present between the first insulating layer and the second insulating layer, and a second inner layer present inside the second insulating layer. 6. The circuit board according to claim 1 , wherein a second mounting region of a second electronic component and a second wiring pattern are provided on a lower surface of the second insulating layer. 7. An electronic device comprising: the circuit board according to claim 1 ; the first electronic component that is mounted on the first mounting region provided to the circuit board and that generates heat; and a heat radiator that is provided so as to contact the lower surface of the thermal conductor provided to the circuit board. 8. The electronic device according to claim 7 , wherein the heat radiator is separated from a second electronic component that is mounted on the lower surface of the second insulating layer provided to the circuit board. 9. The electronic device according to claim 7 , wherein an area of a surface of each of the thermal conductor and the heat radiator facing a first insulating layer provided to the circuit board is larger than an area of the first mounting region provided to the first insulating layer, wherein a penetration hole penetrating the first insulating layer and the thermal conductor is provided at a non-overlapping position, of the first insulating layer, not overlapping the first mounting region and the first wiring pattern, and a screw hole is provided to the heat radiator in such a way as to communicate with the penetration hole, and wherein, by causing a screw member to penetrate the penetration hole from above the first insulating layer and to be screwed with the screw hole, the heat radiator is fixed to the lower surface of the thermal conductor.

Assignees

Inventors

Classifications

  • Metallic blocks or heatsinks completely inserted in a PCB · CPC title

  • having cavities, e.g. for mounting components (H05K3/4691 takes precedence) · CPC title

  • H05K1/0204Primary

    using means for thermal conduction connection in the thickness direction of the substrate (H05K1/0207 takes precedence) · CPC title

  • Screws · CPC title

  • onto a metallic substrate, e.g. a heat sink (heat sinks for electric apparatus H05K7/20) · CPC title

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Frequently asked questions

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What does patent US9924589B2 cover?
A circuit board includes a first insulating layer having an upper surface on which mounting regions of electronic components and wiring patterns are provided, a metal core provided on the lower surface of the first insulating layer, in such a way as to vertically overlap with the mounting regions, and a second insulating layer provided on the lower surface of the first insulating layer, around …
Who is the assignee on this patent?
Kasashima Masato, Kobayashi Tomoyoshi, Sasaki Satoru, and 2 more
What technology area does this patent fall under?
Primary CPC classification H05K1/0204. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).